r8a77961.dtsi (c95baf12f5077419db01313ab61c2aac007d40cd) r8a77961.dtsi (a582013b7b1a6fbe9e896b5686887bc804800fe0)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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314 soc {
315 compatible = "simple-bus";
316 interrupt-parent = <&gic>;
317 #address-cells = <2>;
318 #size-cells = <2>;
319 ranges;
320
321 rwdt: watchdog@e6020000 {
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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314 soc {
315 compatible = "simple-bus";
316 interrupt-parent = <&gic>;
317 #address-cells = <2>;
318 #size-cells = <2>;
319 ranges;
320
321 rwdt: watchdog@e6020000 {
322 compatible = "renesas,r8a77961-wdt",
323 "renesas,rcar-gen3-wdt";
322 reg = <0 0xe6020000 0 0x0c>;
324 reg = <0 0xe6020000 0 0x0c>;
323 /* placeholder */
325 clocks = <&cpg CPG_MOD 402>;
326 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
327 resets = <&cpg 402>;
328 status = "disabled";
324 };
325
329 };
330
331 gpio0: gpio@e6050000 {
332 compatible = "renesas,gpio-r8a77961",
333 "renesas,rcar-gen3-gpio";
334 reg = <0 0xe6050000 0 0x50>;
335 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
336 #gpio-cells = <2>;
337 gpio-controller;
338 gpio-ranges = <&pfc 0 0 16>;
339 #interrupt-cells = <2>;
340 interrupt-controller;
341 clocks = <&cpg CPG_MOD 912>;
342 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
343 resets = <&cpg 912>;
344 };
345
346 gpio1: gpio@e6051000 {
347 compatible = "renesas,gpio-r8a77961",
348 "renesas,rcar-gen3-gpio";
349 reg = <0 0xe6051000 0 0x50>;
350 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
351 #gpio-cells = <2>;
352 gpio-controller;
353 gpio-ranges = <&pfc 0 32 29>;
354 #interrupt-cells = <2>;
355 interrupt-controller;
356 clocks = <&cpg CPG_MOD 911>;
357 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
358 resets = <&cpg 911>;
359 };
360
326 gpio2: gpio@e6052000 {
361 gpio2: gpio@e6052000 {
362 compatible = "renesas,gpio-r8a77961",
363 "renesas,rcar-gen3-gpio";
327 reg = <0 0xe6052000 0 0x50>;
364 reg = <0 0xe6052000 0 0x50>;
365 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
328 #gpio-cells = <2>;
329 gpio-controller;
366 #gpio-cells = <2>;
367 gpio-controller;
368 gpio-ranges = <&pfc 0 64 15>;
330 #interrupt-cells = <2>;
331 interrupt-controller;
369 #interrupt-cells = <2>;
370 interrupt-controller;
332 /* placeholder */
371 clocks = <&cpg CPG_MOD 910>;
372 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
373 resets = <&cpg 910>;
333 };
334
335 gpio3: gpio@e6053000 {
374 };
375
376 gpio3: gpio@e6053000 {
377 compatible = "renesas,gpio-r8a77961",
378 "renesas,rcar-gen3-gpio";
336 reg = <0 0xe6053000 0 0x50>;
379 reg = <0 0xe6053000 0 0x50>;
380 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
337 #gpio-cells = <2>;
338 gpio-controller;
381 #gpio-cells = <2>;
382 gpio-controller;
383 gpio-ranges = <&pfc 0 96 16>;
339 #interrupt-cells = <2>;
340 interrupt-controller;
384 #interrupt-cells = <2>;
385 interrupt-controller;
341 /* placeholder */
386 clocks = <&cpg CPG_MOD 909>;
387 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
388 resets = <&cpg 909>;
342 };
343
344 gpio4: gpio@e6054000 {
389 };
390
391 gpio4: gpio@e6054000 {
392 compatible = "renesas,gpio-r8a77961",
393 "renesas,rcar-gen3-gpio";
345 reg = <0 0xe6054000 0 0x50>;
394 reg = <0 0xe6054000 0 0x50>;
395 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
346 #gpio-cells = <2>;
347 gpio-controller;
396 #gpio-cells = <2>;
397 gpio-controller;
398 gpio-ranges = <&pfc 0 128 18>;
348 #interrupt-cells = <2>;
349 interrupt-controller;
399 #interrupt-cells = <2>;
400 interrupt-controller;
350 /* placeholder */
401 clocks = <&cpg CPG_MOD 908>;
402 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
403 resets = <&cpg 908>;
351 };
352
353 gpio5: gpio@e6055000 {
404 };
405
406 gpio5: gpio@e6055000 {
407 compatible = "renesas,gpio-r8a77961",
408 "renesas,rcar-gen3-gpio";
354 reg = <0 0xe6055000 0 0x50>;
409 reg = <0 0xe6055000 0 0x50>;
410 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
355 #gpio-cells = <2>;
356 gpio-controller;
411 #gpio-cells = <2>;
412 gpio-controller;
413 gpio-ranges = <&pfc 0 160 26>;
357 #interrupt-cells = <2>;
358 interrupt-controller;
414 #interrupt-cells = <2>;
415 interrupt-controller;
359 /* placeholder */
416 clocks = <&cpg CPG_MOD 907>;
417 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
418 resets = <&cpg 907>;
360 };
361
362 gpio6: gpio@e6055400 {
419 };
420
421 gpio6: gpio@e6055400 {
422 compatible = "renesas,gpio-r8a77961",
423 "renesas,rcar-gen3-gpio";
363 reg = <0 0xe6055400 0 0x50>;
424 reg = <0 0xe6055400 0 0x50>;
425 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
364 #gpio-cells = <2>;
365 gpio-controller;
426 #gpio-cells = <2>;
427 gpio-controller;
428 gpio-ranges = <&pfc 0 192 32>;
366 #interrupt-cells = <2>;
367 interrupt-controller;
429 #interrupt-cells = <2>;
430 interrupt-controller;
368 /* placeholder */
431 clocks = <&cpg CPG_MOD 906>;
432 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
433 resets = <&cpg 906>;
369 };
370
434 };
435
436 gpio7: gpio@e6055800 {
437 compatible = "renesas,gpio-r8a77961",
438 "renesas,rcar-gen3-gpio";
439 reg = <0 0xe6055800 0 0x50>;
440 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
441 #gpio-cells = <2>;
442 gpio-controller;
443 gpio-ranges = <&pfc 0 224 4>;
444 #interrupt-cells = <2>;
445 interrupt-controller;
446 clocks = <&cpg CPG_MOD 905>;
447 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
448 resets = <&cpg 905>;
449 };
450
371 pfc: pin-controller@e6060000 {
372 compatible = "renesas,pfc-r8a77961";
373 reg = <0 0xe6060000 0 0x50c>;
374 };
375
376 cpg: clock-controller@e6150000 {
377 compatible = "renesas,r8a77961-cpg-mssr";
378 reg = <0 0xe6150000 0 0x1000>;

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396
397 intc_ex: interrupt-controller@e61c0000 {
398 #interrupt-cells = <2>;
399 interrupt-controller;
400 reg = <0 0xe61c0000 0 0x200>;
401 /* placeholder */
402 };
403
451 pfc: pin-controller@e6060000 {
452 compatible = "renesas,pfc-r8a77961";
453 reg = <0 0xe6060000 0 0x50c>;
454 };
455
456 cpg: clock-controller@e6150000 {
457 compatible = "renesas,r8a77961-cpg-mssr";
458 reg = <0 0xe6150000 0 0x1000>;

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476
477 intc_ex: interrupt-controller@e61c0000 {
478 #interrupt-cells = <2>;
479 interrupt-controller;
480 reg = <0 0xe61c0000 0 0x200>;
481 /* placeholder */
482 };
483
484 i2c0: i2c@e6500000 {
485 #address-cells = <1>;
486 #size-cells = <0>;
487 compatible = "renesas,i2c-r8a77961",
488 "renesas,rcar-gen3-i2c";
489 reg = <0 0xe6500000 0 0x40>;
490 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
491 clocks = <&cpg CPG_MOD 931>;
492 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
493 resets = <&cpg 931>;
494 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
495 <&dmac2 0x91>, <&dmac2 0x90>;
496 dma-names = "tx", "rx", "tx", "rx";
497 i2c-scl-internal-delay-ns = <110>;
498 status = "disabled";
499 };
500
501 i2c1: i2c@e6508000 {
502 #address-cells = <1>;
503 #size-cells = <0>;
504 compatible = "renesas,i2c-r8a77961",
505 "renesas,rcar-gen3-i2c";
506 reg = <0 0xe6508000 0 0x40>;
507 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
508 clocks = <&cpg CPG_MOD 930>;
509 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
510 resets = <&cpg 930>;
511 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
512 <&dmac2 0x93>, <&dmac2 0x92>;
513 dma-names = "tx", "rx", "tx", "rx";
514 i2c-scl-internal-delay-ns = <6>;
515 status = "disabled";
516 };
517
404 i2c2: i2c@e6510000 {
405 #address-cells = <1>;
406 #size-cells = <0>;
518 i2c2: i2c@e6510000 {
519 #address-cells = <1>;
520 #size-cells = <0>;
521 compatible = "renesas,i2c-r8a77961",
522 "renesas,rcar-gen3-i2c";
407 reg = <0 0xe6510000 0 0x40>;
523 reg = <0 0xe6510000 0 0x40>;
408 /* placeholder */
524 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 929>;
526 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
527 resets = <&cpg 929>;
528 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
529 <&dmac2 0x95>, <&dmac2 0x94>;
530 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay-ns = <6>;
532 status = "disabled";
409 };
410
533 };
534
535 i2c3: i2c@e66d0000 {
536 #address-cells = <1>;
537 #size-cells = <0>;
538 compatible = "renesas,i2c-r8a77961",
539 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe66d0000 0 0x40>;
541 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 928>;
543 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
544 resets = <&cpg 928>;
545 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
546 dma-names = "tx", "rx";
547 i2c-scl-internal-delay-ns = <110>;
548 status = "disabled";
549 };
550
411 i2c4: i2c@e66d8000 {
412 #address-cells = <1>;
413 #size-cells = <0>;
551 i2c4: i2c@e66d8000 {
552 #address-cells = <1>;
553 #size-cells = <0>;
554 compatible = "renesas,i2c-r8a77961",
555 "renesas,rcar-gen3-i2c";
414 reg = <0 0xe66d8000 0 0x40>;
556 reg = <0 0xe66d8000 0 0x40>;
415 /* placeholder */
557 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&cpg CPG_MOD 927>;
559 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
560 resets = <&cpg 927>;
561 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
562 dma-names = "tx", "rx";
563 i2c-scl-internal-delay-ns = <110>;
564 status = "disabled";
416 };
417
565 };
566
567 i2c5: i2c@e66e0000 {
568 #address-cells = <1>;
569 #size-cells = <0>;
570 compatible = "renesas,i2c-r8a77961",
571 "renesas,rcar-gen3-i2c";
572 reg = <0 0xe66e0000 0 0x40>;
573 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
574 clocks = <&cpg CPG_MOD 919>;
575 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
576 resets = <&cpg 919>;
577 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
578 dma-names = "tx", "rx";
579 i2c-scl-internal-delay-ns = <110>;
580 status = "disabled";
581 };
582
583 i2c6: i2c@e66e8000 {
584 #address-cells = <1>;
585 #size-cells = <0>;
586 compatible = "renesas,i2c-r8a77961",
587 "renesas,rcar-gen3-i2c";
588 reg = <0 0xe66e8000 0 0x40>;
589 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
590 clocks = <&cpg CPG_MOD 918>;
591 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
592 resets = <&cpg 918>;
593 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
594 dma-names = "tx", "rx";
595 i2c-scl-internal-delay-ns = <6>;
596 status = "disabled";
597 };
598
418 i2c_dvfs: i2c@e60b0000 {
419 #address-cells = <1>;
420 #size-cells = <0>;
599 i2c_dvfs: i2c@e60b0000 {
600 #address-cells = <1>;
601 #size-cells = <0>;
602 compatible = "renesas,iic-r8a77961",
603 "renesas,rcar-gen3-iic",
604 "renesas,rmobile-iic";
421 reg = <0 0xe60b0000 0 0x425>;
605 reg = <0 0xe60b0000 0 0x425>;
422 /* placeholder */
606 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
607 clocks = <&cpg CPG_MOD 926>;
608 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
609 resets = <&cpg 926>;
610 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
611 dma-names = "tx", "rx";
612 status = "disabled";
423 };
424
613 };
614
615
425 hscif1: serial@e6550000 {
426 reg = <0 0xe6550000 0 0x60>;
427 /* placeholder */
428 };
429
430 hsusb: usb@e6590000 {
431 reg = <0 0xe6590000 0 0x200>;
432 /* placeholder */
433 };
434
435 usb3_phy0: usb-phy@e65ee000 {
436 reg = <0 0xe65ee000 0 0x90>;
437 #phy-cells = <0>;
438 /* placeholder */
439 };
440
616 hscif1: serial@e6550000 {
617 reg = <0 0xe6550000 0 0x60>;
618 /* placeholder */
619 };
620
621 hsusb: usb@e6590000 {
622 reg = <0 0xe6590000 0 0x200>;
623 /* placeholder */
624 };
625
626 usb3_phy0: usb-phy@e65ee000 {
627 reg = <0 0xe65ee000 0 0x90>;
628 #phy-cells = <0>;
629 /* placeholder */
630 };
631
632 arm_cc630p: crypto@e6601000 {
633 compatible = "arm,cryptocell-630p-ree";
634 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
635 reg = <0x0 0xe6601000 0 0x1000>;
636 clocks = <&cpg CPG_MOD 229>;
637 resets = <&cpg 229>;
638 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
639 };
640
641 dmac0: dma-controller@e6700000 {
642 compatible = "renesas,dmac-r8a77961",
643 "renesas,rcar-dmac";
644 reg = <0 0xe6700000 0 0x10000>;
645 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
646 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
647 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
648 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
649 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
650 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
651 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
652 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
653 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
654 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
655 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
656 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
657 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
658 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
659 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
660 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
661 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
662 interrupt-names = "error",
663 "ch0", "ch1", "ch2", "ch3",
664 "ch4", "ch5", "ch6", "ch7",
665 "ch8", "ch9", "ch10", "ch11",
666 "ch12", "ch13", "ch14", "ch15";
667 clocks = <&cpg CPG_MOD 219>;
668 clock-names = "fck";
669 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
670 resets = <&cpg 219>;
671 #dma-cells = <1>;
672 dma-channels = <16>;
673 };
674
675 dmac1: dma-controller@e7300000 {
676 compatible = "renesas,dmac-r8a77961",
677 "renesas,rcar-dmac";
678 reg = <0 0xe7300000 0 0x10000>;
679 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
680 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
681 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
682 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
683 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
684 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
685 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
686 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
687 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
688 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
689 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
690 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
691 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
692 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
693 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
694 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
695 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
696 interrupt-names = "error",
697 "ch0", "ch1", "ch2", "ch3",
698 "ch4", "ch5", "ch6", "ch7",
699 "ch8", "ch9", "ch10", "ch11",
700 "ch12", "ch13", "ch14", "ch15";
701 clocks = <&cpg CPG_MOD 218>;
702 clock-names = "fck";
703 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
704 resets = <&cpg 218>;
705 #dma-cells = <1>;
706 dma-channels = <16>;
707 };
708
709 dmac2: dma-controller@e7310000 {
710 compatible = "renesas,dmac-r8a77961",
711 "renesas,rcar-dmac";
712 reg = <0 0xe7310000 0 0x10000>;
713 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
714 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
715 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
716 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
717 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
718 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
719 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
720 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
721 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
722 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
723 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
724 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
725 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
726 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
727 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
728 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
729 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
730 interrupt-names = "error",
731 "ch0", "ch1", "ch2", "ch3",
732 "ch4", "ch5", "ch6", "ch7",
733 "ch8", "ch9", "ch10", "ch11",
734 "ch12", "ch13", "ch14", "ch15";
735 clocks = <&cpg CPG_MOD 217>;
736 clock-names = "fck";
737 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
738 resets = <&cpg 217>;
739 #dma-cells = <1>;
740 dma-channels = <16>;
741 };
742
441 avb: ethernet@e6800000 {
743 avb: ethernet@e6800000 {
744 compatible = "renesas,etheravb-r8a77961",
745 "renesas,etheravb-rcar-gen3";
442 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
746 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
747 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
748 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
749 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
750 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
751 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
752 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
753 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
754 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
755 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
756 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
757 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
758 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
760 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
761 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
762 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
763 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
764 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
765 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
766 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
767 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
768 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
769 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
770 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
771 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
772 interrupt-names = "ch0", "ch1", "ch2", "ch3",
773 "ch4", "ch5", "ch6", "ch7",
774 "ch8", "ch9", "ch10", "ch11",
775 "ch12", "ch13", "ch14", "ch15",
776 "ch16", "ch17", "ch18", "ch19",
777 "ch20", "ch21", "ch22", "ch23",
778 "ch24";
779 clocks = <&cpg CPG_MOD 812>;
780 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
781 resets = <&cpg 812>;
782 phy-mode = "rgmii";
443 #address-cells = <1>;
444 #size-cells = <0>;
783 #address-cells = <1>;
784 #size-cells = <0>;
445 /* placeholder */
785 status = "disabled";
446 };
447
448 pwm1: pwm@e6e31000 {
449 reg = <0 0xe6e31000 0 8>;
450 #pwm-cells = <2>;
451 /* placeholder */
452 };
453

--- 115 unchanged lines hidden (view full) ---

569 };
570
571 usb2_phy1: usb-phy@ee0a0200 {
572 reg = <0 0xee0a0200 0 0x700>;
573 /* placeholder */
574 };
575
576 sdhi0: sd@ee100000 {
786 };
787
788 pwm1: pwm@e6e31000 {
789 reg = <0 0xe6e31000 0 8>;
790 #pwm-cells = <2>;
791 /* placeholder */
792 };
793

--- 115 unchanged lines hidden (view full) ---

909 };
910
911 usb2_phy1: usb-phy@ee0a0200 {
912 reg = <0 0xee0a0200 0 0x700>;
913 /* placeholder */
914 };
915
916 sdhi0: sd@ee100000 {
917 compatible = "renesas,sdhi-r8a77961",
918 "renesas,rcar-gen3-sdhi";
577 reg = <0 0xee100000 0 0x2000>;
919 reg = <0 0xee100000 0 0x2000>;
578 /* placeholder */
920 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
921 clocks = <&cpg CPG_MOD 314>;
922 max-frequency = <200000000>;
923 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
924 resets = <&cpg 314>;
925 status = "disabled";
579 };
580
926 };
927
928 sdhi1: sd@ee120000 {
929 compatible = "renesas,sdhi-r8a77961",
930 "renesas,rcar-gen3-sdhi";
931 reg = <0 0xee120000 0 0x2000>;
932 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
933 clocks = <&cpg CPG_MOD 313>;
934 max-frequency = <200000000>;
935 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
936 resets = <&cpg 313>;
937 status = "disabled";
938 };
939
581 sdhi2: sd@ee140000 {
940 sdhi2: sd@ee140000 {
941 compatible = "renesas,sdhi-r8a77961",
942 "renesas,rcar-gen3-sdhi";
582 reg = <0 0xee140000 0 0x2000>;
943 reg = <0 0xee140000 0 0x2000>;
583 /* placeholder */
944 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
945 clocks = <&cpg CPG_MOD 312>;
946 max-frequency = <200000000>;
947 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
948 resets = <&cpg 312>;
949 status = "disabled";
584 };
585
586 sdhi3: sd@ee160000 {
950 };
951
952 sdhi3: sd@ee160000 {
953 compatible = "renesas,sdhi-r8a77961",
954 "renesas,rcar-gen3-sdhi";
587 reg = <0 0xee160000 0 0x2000>;
955 reg = <0 0xee160000 0 0x2000>;
588 /* placeholder */
956 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
957 clocks = <&cpg CPG_MOD 311>;
958 max-frequency = <200000000>;
959 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
960 resets = <&cpg 311>;
961 status = "disabled";
589 };
590
591 gic: interrupt-controller@f1010000 {
592 compatible = "arm,gic-400";
593 #interrupt-cells = <3>;
594 #address-cells = <0>;
595 interrupt-controller;
596 reg = <0x0 0xf1010000 0 0x1000>,

--- 127 unchanged lines hidden --- 		962 };
963
964 gic: interrupt-controller@f1010000 {
965 compatible = "arm,gic-400";
966 #interrupt-cells = <3>;
967 #address-cells = <0>;
968 interrupt-controller;
969 reg = <0x0 0xf1010000 0 0x1000>,

--- 127 unchanged lines hidden ---