r8a77961.dtsi (9ccf74a93d3c04bbf8790c852300d95c8dfe0c86) r8a77961.dtsi (8372579d5bb5e59b3cd6ecea354310a74399e473)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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513 };
514
515 usb3_phy0: usb-phy@e65ee000 {
516 reg = <0 0xe65ee000 0 0x90>;
517 #phy-cells = <0>;
518 /* placeholder */
519 };
520
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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513 };
514
515 usb3_phy0: usb-phy@e65ee000 {
516 reg = <0 0xe65ee000 0 0x90>;
517 #phy-cells = <0>;
518 /* placeholder */
519 };
520
521 dmac0: dma-controller@e6700000 {
522 compatible = "renesas,dmac-r8a77961",
523 "renesas,rcar-dmac";
524 reg = <0 0xe6700000 0 0x10000>;
525 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
526 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
527 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
528 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
529 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
530 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
531 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
532 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
533 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
534 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
535 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
536 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
537 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
538 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
539 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
540 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
541 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
542 interrupt-names = "error",
543 "ch0", "ch1", "ch2", "ch3",
544 "ch4", "ch5", "ch6", "ch7",
545 "ch8", "ch9", "ch10", "ch11",
546 "ch12", "ch13", "ch14", "ch15";
547 clocks = <&cpg CPG_MOD 219>;
548 clock-names = "fck";
549 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
550 resets = <&cpg 219>;
551 #dma-cells = <1>;
552 dma-channels = <16>;
553 };
554
555 dmac1: dma-controller@e7300000 {
556 compatible = "renesas,dmac-r8a77961",
557 "renesas,rcar-dmac";
558 reg = <0 0xe7300000 0 0x10000>;
559 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
560 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
561 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
562 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
563 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
564 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
565 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
566 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
567 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
568 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
569 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
570 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
571 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
572 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
573 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
574 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
575 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
576 interrupt-names = "error",
577 "ch0", "ch1", "ch2", "ch3",
578 "ch4", "ch5", "ch6", "ch7",
579 "ch8", "ch9", "ch10", "ch11",
580 "ch12", "ch13", "ch14", "ch15";
581 clocks = <&cpg CPG_MOD 218>;
582 clock-names = "fck";
583 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
584 resets = <&cpg 218>;
585 #dma-cells = <1>;
586 dma-channels = <16>;
587 };
588
589 dmac2: dma-controller@e7310000 {
590 compatible = "renesas,dmac-r8a77961",
591 "renesas,rcar-dmac";
592 reg = <0 0xe7310000 0 0x10000>;
593 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
594 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
595 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
596 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
597 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
598 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
599 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
600 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
601 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
602 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
603 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
604 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
605 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
606 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
607 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
608 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
609 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
610 interrupt-names = "error",
611 "ch0", "ch1", "ch2", "ch3",
612 "ch4", "ch5", "ch6", "ch7",
613 "ch8", "ch9", "ch10", "ch11",
614 "ch12", "ch13", "ch14", "ch15";
615 clocks = <&cpg CPG_MOD 217>;
616 clock-names = "fck";
617 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
618 resets = <&cpg 217>;
619 #dma-cells = <1>;
620 dma-channels = <16>;
621 };
622
521 avb: ethernet@e6800000 {
522 compatible = "renesas,etheravb-r8a77961",
523 "renesas,etheravb-rcar-gen3";
524 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
525 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
526 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
527 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
528 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,

--- 313 unchanged lines hidden --- 		623 avb: ethernet@e6800000 {
624 compatible = "renesas,etheravb-r8a77961",
625 "renesas,etheravb-rcar-gen3";
626 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
627 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
628 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
629 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
630 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,

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