r8a77961.dtsi (87a0b2fafc09766d8c55461a18345a1cfb10a7fe) r8a77961.dtsi (d45db61c2e569e0e95925a41bdb926913487f21a)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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41
42 /* External CAN clock - to be overridden by boards that provide it */
43 can_clk: can {
44 compatible = "fixed-clock";
45 #clock-cells = <0>;
46 clock-frequency = <0>;
47 };
48
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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41
42 /* External CAN clock - to be overridden by boards that provide it */
43 can_clk: can {
44 compatible = "fixed-clock";
45 #clock-cells = <0>;
46 clock-frequency = <0>;
47 };
48
49 cluster0_opp: opp_table0 {
49 cluster0_opp: opp-table-0 {
50 compatible = "operating-points-v2";
51 opp-shared;
52
53 opp-500000000 {
54 opp-hz = /bits/ 64 <500000000>;
55 opp-microvolt = <830000>;
56 clock-latency-ns = <300000>;
57 };

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81 opp-1800000000 {
82 opp-hz = /bits/ 64 <1800000000>;
83 opp-microvolt = <960000>;
84 clock-latency-ns = <300000>;
85 turbo-mode;
86 };
87 };
88
50 compatible = "operating-points-v2";
51 opp-shared;
52
53 opp-500000000 {
54 opp-hz = /bits/ 64 <500000000>;
55 opp-microvolt = <830000>;
56 clock-latency-ns = <300000>;
57 };

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81 opp-1800000000 {
82 opp-hz = /bits/ 64 <1800000000>;
83 opp-microvolt = <960000>;
84 clock-latency-ns = <300000>;
85 turbo-mode;
86 };
87 };
88
89 cluster1_opp: opp_table1 {
89 cluster1_opp: opp-table-1 {
90 compatible = "operating-points-v2";
91 opp-shared;
92
93 opp-800000000 {
94 opp-hz = /bits/ 64 <800000000>;
95 opp-microvolt = <820000>;
96 clock-latency-ns = <300000>;
97 };

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2307 status = "disabled";
2308 };
2309
2310 sdhi0: mmc@ee100000 {
2311 compatible = "renesas,sdhi-r8a77961",
2312 "renesas,rcar-gen3-sdhi";
2313 reg = <0 0xee100000 0 0x2000>;
2314 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
90 compatible = "operating-points-v2";
91 opp-shared;
92
93 opp-800000000 {
94 opp-hz = /bits/ 64 <800000000>;
95 opp-microvolt = <820000>;
96 clock-latency-ns = <300000>;
97 };

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2307 status = "disabled";
2308 };
2309
2310 sdhi0: mmc@ee100000 {
2311 compatible = "renesas,sdhi-r8a77961",
2312 "renesas,rcar-gen3-sdhi";
2313 reg = <0 0xee100000 0 0x2000>;
2314 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2315 clocks = <&cpg CPG_MOD 314>;
2315 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77961_CLK_SD0H>;
2316 clock-names = "core", "clkh";
2316 max-frequency = <200000000>;
2317 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2318 resets = <&cpg 314>;
2319 iommus = <&ipmmu_ds1 32>;
2320 status = "disabled";
2321 };
2322
2323 sdhi1: mmc@ee120000 {
2324 compatible = "renesas,sdhi-r8a77961",
2325 "renesas,rcar-gen3-sdhi";
2326 reg = <0 0xee120000 0 0x2000>;
2327 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2317 max-frequency = <200000000>;
2318 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2319 resets = <&cpg 314>;
2320 iommus = <&ipmmu_ds1 32>;
2321 status = "disabled";
2322 };
2323
2324 sdhi1: mmc@ee120000 {
2325 compatible = "renesas,sdhi-r8a77961",
2326 "renesas,rcar-gen3-sdhi";
2327 reg = <0 0xee120000 0 0x2000>;
2328 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2328 clocks = <&cpg CPG_MOD 313>;
2329 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77961_CLK_SD1H>;
2330 clock-names = "core", "clkh";
2329 max-frequency = <200000000>;
2330 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2331 resets = <&cpg 313>;
2332 iommus = <&ipmmu_ds1 33>;
2333 status = "disabled";
2334 };
2335
2336 sdhi2: mmc@ee140000 {
2337 compatible = "renesas,sdhi-r8a77961",
2338 "renesas,rcar-gen3-sdhi";
2339 reg = <0 0xee140000 0 0x2000>;
2340 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2331 max-frequency = <200000000>;
2332 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2333 resets = <&cpg 313>;
2334 iommus = <&ipmmu_ds1 33>;
2335 status = "disabled";
2336 };
2337
2338 sdhi2: mmc@ee140000 {
2339 compatible = "renesas,sdhi-r8a77961",
2340 "renesas,rcar-gen3-sdhi";
2341 reg = <0 0xee140000 0 0x2000>;
2342 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2341 clocks = <&cpg CPG_MOD 312>;
2343 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77961_CLK_SD2H>;
2344 clock-names = "core", "clkh";
2342 max-frequency = <200000000>;
2343 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2344 resets = <&cpg 312>;
2345 iommus = <&ipmmu_ds1 34>;
2346 status = "disabled";
2347 };
2348
2349 sdhi3: mmc@ee160000 {
2350 compatible = "renesas,sdhi-r8a77961",
2351 "renesas,rcar-gen3-sdhi";
2352 reg = <0 0xee160000 0 0x2000>;
2353 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2345 max-frequency = <200000000>;
2346 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2347 resets = <&cpg 312>;
2348 iommus = <&ipmmu_ds1 34>;
2349 status = "disabled";
2350 };
2351
2352 sdhi3: mmc@ee160000 {
2353 compatible = "renesas,sdhi-r8a77961",
2354 "renesas,rcar-gen3-sdhi";
2355 reg = <0 0xee160000 0 0x2000>;
2356 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2354 clocks = <&cpg CPG_MOD 311>;
2357 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77961_CLK_SD3H>;
2358 clock-names = "core", "clkh";
2355 max-frequency = <200000000>;
2356 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2357 resets = <&cpg 311>;
2358 iommus = <&ipmmu_ds1 35>;
2359 status = "disabled";
2360 };
2361
2362 gic: interrupt-controller@f1010000 {

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2713 reg = <1>;
2714 du_out_hdmi0: endpoint {
2715 remote-endpoint = <&dw_hdmi0_in>;
2716 };
2717 };
2718 port@2 {
2719 reg = <2>;
2720 du_out_lvds0: endpoint {
2359 max-frequency = <200000000>;
2360 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2361 resets = <&cpg 311>;
2362 iommus = <&ipmmu_ds1 35>;
2363 status = "disabled";
2364 };
2365
2366 gic: interrupt-controller@f1010000 {

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2717 reg = <1>;
2718 du_out_hdmi0: endpoint {
2719 remote-endpoint = <&dw_hdmi0_in>;
2720 };
2721 };
2722 port@2 {
2723 reg = <2>;
2724 du_out_lvds0: endpoint {
2725 remote-endpoint = <&lvds0_in>;
2721 };
2722 };
2723 };
2724 };
2725
2726 };
2727 };
2728 };
2729 };
2730
2731 lvds0: lvds@feb90000 {
2732 compatible = "renesas,r8a77961-lvds";
2733 reg = <0 0xfeb90000 0 0x14>;
2734 clocks = <&cpg CPG_MOD 727>;
2735 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2736 resets = <&cpg 727>;
2737 status = "disabled";
2738
2739 ports {
2740 #address-cells = <1>;
2741 #size-cells = <0>;
2742
2743 port@0 {
2744 reg = <0>;
2745 lvds0_in: endpoint {
2746 remote-endpoint = <&du_out_lvds0>;
2747 };
2748 };
2749 port@1 {
2750 reg = <1>;
2751 lvds0_out: endpoint {
2752 };
2753 };
2754 };
2755 };
2756
2726 prr: chipid@fff00044 {
2727 compatible = "renesas,prr";
2728 reg = <0 0xfff00044 0 4>;
2729 };
2730 };
2731
2732 thermal-zones {
2757 prr: chipid@fff00044 {
2758 compatible = "renesas,prr";
2759 reg = <0 0xfff00044 0 4>;
2760 };
2761 };
2762
2763 thermal-zones {
2733 sensor_thermal1: sensor-thermal1 {
2764 sensor1_thermal: sensor1-thermal {
2734 polling-delay-passive = <250>;
2735 polling-delay = <1000>;
2736 thermal-sensors = <&tsc 0>;
2737 sustainable-power = <3874>;
2738
2739 trips {
2740 sensor1_crit: sensor1-crit {
2741 temperature = <120000>;
2742 hysteresis = <1000>;
2743 type = "critical";
2744 };
2745 };
2746 };
2747
2765 polling-delay-passive = <250>;
2766 polling-delay = <1000>;
2767 thermal-sensors = <&tsc 0>;
2768 sustainable-power = <3874>;
2769
2770 trips {
2771 sensor1_crit: sensor1-crit {
2772 temperature = <120000>;
2773 hysteresis = <1000>;
2774 type = "critical";
2775 };
2776 };
2777 };
2778
2748 sensor_thermal2: sensor-thermal2 {
2779 sensor2_thermal: sensor2-thermal {
2749 polling-delay-passive = <250>;
2750 polling-delay = <1000>;
2751 thermal-sensors = <&tsc 1>;
2752 sustainable-power = <3874>;
2753
2754 trips {
2755 sensor2_crit: sensor2-crit {
2756 temperature = <120000>;
2757 hysteresis = <1000>;
2758 type = "critical";
2759 };
2760 };
2761 };
2762
2780 polling-delay-passive = <250>;
2781 polling-delay = <1000>;
2782 thermal-sensors = <&tsc 1>;
2783 sustainable-power = <3874>;
2784
2785 trips {
2786 sensor2_crit: sensor2-crit {
2787 temperature = <120000>;
2788 hysteresis = <1000>;
2789 type = "critical";
2790 };
2791 };
2792 };
2793
2763 sensor_thermal3: sensor-thermal3 {
2794 sensor3_thermal: sensor3-thermal {
2764 polling-delay-passive = <250>;
2765 polling-delay = <1000>;
2766 thermal-sensors = <&tsc 2>;
2767 sustainable-power = <3874>;
2768
2769 cooling-maps {
2770 map0 {
2771 trip = <&target>;

--- 46 unchanged lines hidden --- 		2795 polling-delay-passive = <250>;
2796 polling-delay = <1000>;
2797 thermal-sensors = <&tsc 2>;
2798 sustainable-power = <3874>;
2799
2800 cooling-maps {
2801 map0 {
2802 trip = <&target>;

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