r8a77961.dtsi (57e04eeda515ee979fec3bc3d64c408feae18acc) r8a77961.dtsi (36065b0715dfeabf04353649242ba13280308b03)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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314 soc {
315 compatible = "simple-bus";
316 interrupt-parent = <&gic>;
317 #address-cells = <2>;
318 #size-cells = <2>;
319 ranges;
320
321 rwdt: watchdog@e6020000 {
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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314 soc {
315 compatible = "simple-bus";
316 interrupt-parent = <&gic>;
317 #address-cells = <2>;
318 #size-cells = <2>;
319 ranges;
320
321 rwdt: watchdog@e6020000 {
322 compatible = "renesas,r8a77961-wdt",
323 "renesas,rcar-gen3-wdt";
322 reg = <0 0xe6020000 0 0x0c>;
324 reg = <0 0xe6020000 0 0x0c>;
323 /* placeholder */
325 clocks = <&cpg CPG_MOD 402>;
326 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
327 resets = <&cpg 402>;
328 status = "disabled";
324 };
325
326 gpio2: gpio@e6052000 {
327 reg = <0 0xe6052000 0 0x50>;
328 #gpio-cells = <2>;
329 gpio-controller;
330 #interrupt-cells = <2>;
331 interrupt-controller;

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329 };
330
331 gpio2: gpio@e6052000 {
332 reg = <0 0xe6052000 0 0x50>;
333 #gpio-cells = <2>;
334 gpio-controller;
335 #interrupt-cells = <2>;
336 interrupt-controller;

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