r8a77961.dtsi (19d40e551353dfb6b74f07335b608d049237ff47) r8a77961.dtsi (111cc9ace2b5047a34642f7eb8b1dbdba10cda56)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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900 };
901
902 usb2_phy1: usb-phy@ee0a0200 {
903 reg = <0 0xee0a0200 0 0x700>;
904 /* placeholder */
905 };
906
907 sdhi0: sd@ee100000 {
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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900 };
901
902 usb2_phy1: usb-phy@ee0a0200 {
903 reg = <0 0xee0a0200 0 0x700>;
904 /* placeholder */
905 };
906
907 sdhi0: sd@ee100000 {
908 compatible = "renesas,sdhi-r8a77961",
909 "renesas,rcar-gen3-sdhi";
908 reg = <0 0xee100000 0 0x2000>;
910 reg = <0 0xee100000 0 0x2000>;
909 /* placeholder */
911 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
912 clocks = <&cpg CPG_MOD 314>;
913 max-frequency = <200000000>;
914 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
915 resets = <&cpg 314>;
916 status = "disabled";
910 };
911
917 };
918
919 sdhi1: sd@ee120000 {
920 compatible = "renesas,sdhi-r8a77961",
921 "renesas,rcar-gen3-sdhi";
922 reg = <0 0xee120000 0 0x2000>;
923 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
924 clocks = <&cpg CPG_MOD 313>;
925 max-frequency = <200000000>;
926 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
927 resets = <&cpg 313>;
928 status = "disabled";
929 };
930
912 sdhi2: sd@ee140000 {
931 sdhi2: sd@ee140000 {
932 compatible = "renesas,sdhi-r8a77961",
933 "renesas,rcar-gen3-sdhi";
913 reg = <0 0xee140000 0 0x2000>;
934 reg = <0 0xee140000 0 0x2000>;
914 /* placeholder */
935 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
936 clocks = <&cpg CPG_MOD 312>;
937 max-frequency = <200000000>;
938 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
939 resets = <&cpg 312>;
940 status = "disabled";
915 };
916
917 sdhi3: sd@ee160000 {
941 };
942
943 sdhi3: sd@ee160000 {
944 compatible = "renesas,sdhi-r8a77961",
945 "renesas,rcar-gen3-sdhi";
918 reg = <0 0xee160000 0 0x2000>;
946 reg = <0 0xee160000 0 0x2000>;
919 /* placeholder */
947 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
948 clocks = <&cpg CPG_MOD 311>;
949 max-frequency = <200000000>;
950 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
951 resets = <&cpg 311>;
952 status = "disabled";
920 };
921
922 gic: interrupt-controller@f1010000 {
923 compatible = "arm,gic-400";
924 #interrupt-cells = <3>;
925 #address-cells = <0>;
926 interrupt-controller;
927 reg = <0x0 0xf1010000 0 0x1000>,

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954
955 gic: interrupt-controller@f1010000 {
956 compatible = "arm,gic-400";
957 #interrupt-cells = <3>;
958 #address-cells = <0>;
959 interrupt-controller;
960 reg = <0x0 0xf1010000 0 0x1000>,

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