r8a77960.dtsi (aa10fab0f859ef86e998ee1cdaa89fc8e542e2c9) r8a77960.dtsi (44b615ac9fab16d1552cd8360454077d411e3c35)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7796-cpg-mssr.h>

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70 opp-hz = /bits/ 64 <1000000000>;
71 opp-microvolt = <820000>;
72 clock-latency-ns = <300000>;
73 };
74 opp-1500000000 {
75 opp-hz = /bits/ 64 <1500000000>;
76 opp-microvolt = <820000>;
77 clock-latency-ns = <300000>;
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7796-cpg-mssr.h>

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70 opp-hz = /bits/ 64 <1000000000>;
71 opp-microvolt = <820000>;
72 clock-latency-ns = <300000>;
73 };
74 opp-1500000000 {
75 opp-hz = /bits/ 64 <1500000000>;
76 opp-microvolt = <820000>;
77 clock-latency-ns = <300000>;
78 opp-suspend;
78 };
79 opp-1600000000 {
80 opp-hz = /bits/ 64 <1600000000>;
81 opp-microvolt = <900000>;
82 clock-latency-ns = <300000>;
83 turbo-mode;
84 };
85 opp-1700000000 {

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1183 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1184 "ch4", "ch5", "ch6", "ch7",
1185 "ch8", "ch9", "ch10", "ch11",
1186 "ch12", "ch13", "ch14", "ch15",
1187 "ch16", "ch17", "ch18", "ch19",
1188 "ch20", "ch21", "ch22", "ch23",
1189 "ch24";
1190 clocks = <&cpg CPG_MOD 812>;
79 };
80 opp-1600000000 {
81 opp-hz = /bits/ 64 <1600000000>;
82 opp-microvolt = <900000>;
83 clock-latency-ns = <300000>;
84 turbo-mode;
85 };
86 opp-1700000000 {

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1184 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1185 "ch4", "ch5", "ch6", "ch7",
1186 "ch8", "ch9", "ch10", "ch11",
1187 "ch12", "ch13", "ch14", "ch15",
1188 "ch16", "ch17", "ch18", "ch19",
1189 "ch20", "ch21", "ch22", "ch23",
1190 "ch24";
1191 clocks = <&cpg CPG_MOD 812>;
1192 clock-names = "fck";
1191 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1192 resets = <&cpg 812>;
1193 phy-mode = "rgmii";
1194 rx-internal-delay-ps = <0>;
1195 tx-internal-delay-ps = <0>;
1196 iommus = <&ipmmu_ds0 16>;
1197 #address-cells = <1>;
1198 #size-cells = <0>;

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1193 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1194 resets = <&cpg 812>;
1195 phy-mode = "rgmii";
1196 rx-internal-delay-ps = <0>;
1197 tx-internal-delay-ps = <0>;
1198 iommus = <&ipmmu_ds0 16>;
1199 #address-cells = <1>;
1200 #size-cells = <0>;

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