r8a77960.dtsi (9ddb236f13594b34a12dacf69a5adca7a1aef35e) r8a77960.dtsi (a2053990f3275e715d69c208d8c0040cac0df593)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7796-cpg-mssr.h>

--- 445 unchanged lines hidden (view full) ---

454 gpio-ranges = <&pfc 0 224 4>;
455 #interrupt-cells = <2>;
456 interrupt-controller;
457 clocks = <&cpg CPG_MOD 905>;
458 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
459 resets = <&cpg 905>;
460 };
461
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7796-cpg-mssr.h>

--- 445 unchanged lines hidden (view full) ---

454 gpio-ranges = <&pfc 0 224 4>;
455 #interrupt-cells = <2>;
456 interrupt-controller;
457 clocks = <&cpg CPG_MOD 905>;
458 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
459 resets = <&cpg 905>;
460 };
461
462 pfc: pin-controller@e6060000 {
462 pfc: pinctrl@e6060000 {
463 compatible = "renesas,pfc-r8a7796";
464 reg = <0 0xe6060000 0 0x50c>;
465 };
466
467 cmt0: timer@e60f0000 {
468 compatible = "renesas,r8a7796-cmt0",
469 "renesas,rcar-gen3-cmt0";
470 reg = <0 0xe60f0000 0 0x1004>;

--- 2512 unchanged lines hidden --- 		463 compatible = "renesas,pfc-r8a7796";
464 reg = <0 0xe6060000 0 0x50c>;
465 };
466
467 cmt0: timer@e60f0000 {
468 compatible = "renesas,r8a7796-cmt0",
469 "renesas,rcar-gen3-cmt0";
470 reg = <0 0xe60f0000 0 0x1004>;

--- 2512 unchanged lines hidden ---