r8a77960.dtsi (98817a84ff1c755c347ac633ff017a623a631fad) r8a77960.dtsi (a6cb262af1e1adfa6287cb43f09021ee42beb21c)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7796-cpg-mssr.h>

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2389 reg = <0 0xee0a0200 0 0x700>;
2390 clocks = <&cpg CPG_MOD 702>;
2391 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2392 resets = <&cpg 702>;
2393 #phy-cells = <1>;
2394 status = "disabled";
2395 };
2396
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7796-cpg-mssr.h>

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2389 reg = <0 0xee0a0200 0 0x700>;
2390 clocks = <&cpg CPG_MOD 702>;
2391 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2392 resets = <&cpg 702>;
2393 #phy-cells = <1>;
2394 status = "disabled";
2395 };
2396
2397 sdhi0: sd@ee100000 {
2397 sdhi0: mmc@ee100000 {
2398 compatible = "renesas,sdhi-r8a7796",
2399 "renesas,rcar-gen3-sdhi";
2400 reg = <0 0xee100000 0 0x2000>;
2401 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2402 clocks = <&cpg CPG_MOD 314>;
2403 max-frequency = <200000000>;
2404 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2405 resets = <&cpg 314>;
2406 iommus = <&ipmmu_ds1 32>;
2407 status = "disabled";
2408 };
2409
2398 compatible = "renesas,sdhi-r8a7796",
2399 "renesas,rcar-gen3-sdhi";
2400 reg = <0 0xee100000 0 0x2000>;
2401 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2402 clocks = <&cpg CPG_MOD 314>;
2403 max-frequency = <200000000>;
2404 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2405 resets = <&cpg 314>;
2406 iommus = <&ipmmu_ds1 32>;
2407 status = "disabled";
2408 };
2409
2410 sdhi1: sd@ee120000 {
2410 sdhi1: mmc@ee120000 {
2411 compatible = "renesas,sdhi-r8a7796",
2412 "renesas,rcar-gen3-sdhi";
2413 reg = <0 0xee120000 0 0x2000>;
2414 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2415 clocks = <&cpg CPG_MOD 313>;
2416 max-frequency = <200000000>;
2417 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2418 resets = <&cpg 313>;
2419 iommus = <&ipmmu_ds1 33>;
2420 status = "disabled";
2421 };
2422
2411 compatible = "renesas,sdhi-r8a7796",
2412 "renesas,rcar-gen3-sdhi";
2413 reg = <0 0xee120000 0 0x2000>;
2414 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2415 clocks = <&cpg CPG_MOD 313>;
2416 max-frequency = <200000000>;
2417 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2418 resets = <&cpg 313>;
2419 iommus = <&ipmmu_ds1 33>;
2420 status = "disabled";
2421 };
2422
2423 sdhi2: sd@ee140000 {
2423 sdhi2: mmc@ee140000 {
2424 compatible = "renesas,sdhi-r8a7796",
2425 "renesas,rcar-gen3-sdhi";
2426 reg = <0 0xee140000 0 0x2000>;
2427 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2428 clocks = <&cpg CPG_MOD 312>;
2429 max-frequency = <200000000>;
2430 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2431 resets = <&cpg 312>;
2432 iommus = <&ipmmu_ds1 34>;
2433 status = "disabled";
2434 };
2435
2424 compatible = "renesas,sdhi-r8a7796",
2425 "renesas,rcar-gen3-sdhi";
2426 reg = <0 0xee140000 0 0x2000>;
2427 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2428 clocks = <&cpg CPG_MOD 312>;
2429 max-frequency = <200000000>;
2430 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2431 resets = <&cpg 312>;
2432 iommus = <&ipmmu_ds1 34>;
2433 status = "disabled";
2434 };
2435
2436 sdhi3: sd@ee160000 {
2436 sdhi3: mmc@ee160000 {
2437 compatible = "renesas,sdhi-r8a7796",
2438 "renesas,rcar-gen3-sdhi";
2439 reg = <0 0xee160000 0 0x2000>;
2440 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2441 clocks = <&cpg CPG_MOD 311>;
2442 max-frequency = <200000000>;
2443 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2444 resets = <&cpg 311>;

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2437 compatible = "renesas,sdhi-r8a7796",
2438 "renesas,rcar-gen3-sdhi";
2439 reg = <0 0xee160000 0 0x2000>;
2440 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2441 clocks = <&cpg CPG_MOD 311>;
2442 max-frequency = <200000000>;
2443 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2444 resets = <&cpg 311>;

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