r8a77960.dtsi (2bc0aa18ee9f34613876f6ac7bf944ad65d63e17) r8a77960.dtsi (f191fba76916dc18c41cf6183d71dbf9a1d821c8)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7796-cpg-mssr.h>

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2527 clock-names = "core", "clkh";
2528 max-frequency = <200000000>;
2529 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2530 resets = <&cpg 311>;
2531 iommus = <&ipmmu_ds1 35>;
2532 status = "disabled";
2533 };
2534
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7796-cpg-mssr.h>

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2527 clock-names = "core", "clkh";
2528 max-frequency = <200000000>;
2529 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2530 resets = <&cpg 311>;
2531 iommus = <&ipmmu_ds1 35>;
2532 status = "disabled";
2533 };
2534
2535 rpc: spi@ee200000 {
2536 compatible = "renesas,r8a7796-rpc-if",
2537 "renesas,rcar-gen3-rpc-if";
2538 reg = <0 0xee200000 0 0x200>,
2539 <0 0x08000000 0 0x04000000>,
2540 <0 0xee208000 0 0x100>;
2541 reg-names = "regs", "dirmap", "wbuf";
2542 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2543 clocks = <&cpg CPG_MOD 917>;
2544 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2545 resets = <&cpg 917>;
2546 #address-cells = <1>;
2547 #size-cells = <0>;
2548 status = "disabled";
2549 };
2550
2535 gic: interrupt-controller@f1010000 {
2536 compatible = "arm,gic-400";
2537 #interrupt-cells = <3>;
2538 #address-cells = <0>;
2539 interrupt-controller;
2540 reg = <0x0 0xf1010000 0 0x1000>,
2541 <0x0 0xf1020000 0 0x20000>,
2542 <0x0 0xf1040000 0 0x20000>,

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2551 gic: interrupt-controller@f1010000 {
2552 compatible = "arm,gic-400";
2553 #interrupt-cells = <3>;
2554 #address-cells = <0>;
2555 interrupt-controller;
2556 reg = <0x0 0xf1010000 0 0x1000>,
2557 <0x0 0xf1020000 0 0x20000>,
2558 <0x0 0xf1040000 0 0x20000>,

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