r8a77960.dtsi (28f2aff1caa4997f58ca31179cad1b4a84a62827) r8a77960.dtsi (03abfdd31c66f0ecd629a1d1362e87551ce6c027)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7796-cpg-mssr.h>

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2819 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2820 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2821 clocks = <&cpg CPG_MOD 724>,
2822 <&cpg CPG_MOD 723>,
2823 <&cpg CPG_MOD 722>;
2824 clock-names = "du.0", "du.1", "du.2";
2825
2826 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7796-cpg-mssr.h>

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2819 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2820 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2821 clocks = <&cpg CPG_MOD 724>,
2822 <&cpg CPG_MOD 723>,
2823 <&cpg CPG_MOD 722>;
2824 clock-names = "du.0", "du.1", "du.2";
2825
2826 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
2827 vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2827 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2828
2829 status = "disabled";
2830
2831 ports {
2832 #address-cells = <1>;
2833 #size-cells = <0>;
2834
2835 port@0 {

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2829 status = "disabled";
2830
2831 ports {
2832 #address-cells = <1>;
2833 #size-cells = <0>;
2834
2835 port@0 {

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