r8a77960.dtsi (0aab5b914b41601ee7e4ba9bd81344665db1fbca) r8a77960.dtsi (9504a9f27a8c2c3a78f566c5cde75b53657b386a)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7796-cpg-mssr.h>

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2457 pciec0: pcie@fe000000 {
2458 compatible = "renesas,pcie-r8a7796",
2459 "renesas,pcie-rcar-gen3";
2460 reg = <0 0xfe000000 0 0x80000>;
2461 #address-cells = <3>;
2462 #size-cells = <2>;
2463 bus-range = <0x00 0xff>;
2464 device_type = "pci";
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7796-cpg-mssr.h>

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2457 pciec0: pcie@fe000000 {
2458 compatible = "renesas,pcie-r8a7796",
2459 "renesas,pcie-rcar-gen3";
2460 reg = <0 0xfe000000 0 0x80000>;
2461 #address-cells = <3>;
2462 #size-cells = <2>;
2463 bus-range = <0x00 0xff>;
2464 device_type = "pci";
2465 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2466 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2467 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2468 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2465 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2466 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2467 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2468 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2469 /* Map all possible DDR as inbound ranges */
2470 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2471 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2472 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2473 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2474 #interrupt-cells = <1>;
2475 interrupt-map-mask = <0 0 0 0>;
2476 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;

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2484 pciec1: pcie@ee800000 {
2485 compatible = "renesas,pcie-r8a7796",
2486 "renesas,pcie-rcar-gen3";
2487 reg = <0 0xee800000 0 0x80000>;
2488 #address-cells = <3>;
2489 #size-cells = <2>;
2490 bus-range = <0x00 0xff>;
2491 device_type = "pci";
2469 /* Map all possible DDR as inbound ranges */
2470 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2471 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2472 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2473 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2474 #interrupt-cells = <1>;
2475 interrupt-map-mask = <0 0 0 0>;
2476 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;

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2484 pciec1: pcie@ee800000 {
2485 compatible = "renesas,pcie-r8a7796",
2486 "renesas,pcie-rcar-gen3";
2487 reg = <0 0xee800000 0 0x80000>;
2488 #address-cells = <3>;
2489 #size-cells = <2>;
2490 bus-range = <0x00 0xff>;
2491 device_type = "pci";
2492 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2493 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2494 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2495 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2492 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2493 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2494 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2495 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2496 /* Map all possible DDR as inbound ranges */
2497 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2498 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2499 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2500 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2501 #interrupt-cells = <1>;
2502 interrupt-map-mask = <0 0 0 0>;
2503 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;

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2496 /* Map all possible DDR as inbound ranges */
2497 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2498 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2499 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2500 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2501 #interrupt-cells = <1>;
2502 interrupt-map-mask = <0 0 0 0>;
2503 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;

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