r8a77951.dtsi (281a94b0f2f0775a2b7825c18bccf7e4c922b7b3) r8a77951.dtsi (4e4c17c6c3907dfc34051cc450a78a38fb371b4f)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car H3 (R8A77951) SoC
4 *
5 * Copyright (C) 2015 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7795-cpg-mssr.h>

--- 602 unchanged lines hidden (view full) ---

611 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
612 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
613 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
614 clocks = <&cpg CPG_MOD 407>;
615 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
616 resets = <&cpg 407>;
617 };
618
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car H3 (R8A77951) SoC
4 *
5 * Copyright (C) 2015 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7795-cpg-mssr.h>

--- 602 unchanged lines hidden (view full) ---

611 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
612 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
613 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
614 clocks = <&cpg CPG_MOD 407>;
615 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
616 resets = <&cpg 407>;
617 };
618
619 tmu0: timer@e61e0000 {
620 compatible = "renesas,tmu-r8a7795", "renesas,tmu";
621 reg = <0 0xe61e0000 0 0x30>;
622 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
623 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
624 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
625 clocks = <&cpg CPG_MOD 125>;
626 clock-names = "fck";
627 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
628 resets = <&cpg 125>;
629 status = "disabled";
630 };
631
632 tmu1: timer@e6fc0000 {
633 compatible = "renesas,tmu-r8a7795", "renesas,tmu";
634 reg = <0 0xe6fc0000 0 0x30>;
635 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
636 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
637 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
638 clocks = <&cpg CPG_MOD 124>;
639 clock-names = "fck";
640 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
641 resets = <&cpg 124>;
642 status = "disabled";
643 };
644
645 tmu2: timer@e6fd0000 {
646 compatible = "renesas,tmu-r8a7795", "renesas,tmu";
647 reg = <0 0xe6fd0000 0 0x30>;
648 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
649 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
650 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
651 clocks = <&cpg CPG_MOD 123>;
652 clock-names = "fck";
653 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
654 resets = <&cpg 123>;
655 status = "disabled";
656 };
657
658 tmu3: timer@e6fe0000 {
659 compatible = "renesas,tmu-r8a7795", "renesas,tmu";
660 reg = <0 0xe6fe0000 0 0x30>;
661 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
662 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
663 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
664 clocks = <&cpg CPG_MOD 122>;
665 clock-names = "fck";
666 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
667 resets = <&cpg 122>;
668 status = "disabled";
669 };
670
671 tmu4: timer@ffc00000 {
672 compatible = "renesas,tmu-r8a7795", "renesas,tmu";
673 reg = <0 0xffc00000 0 0x30>;
674 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
675 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
676 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
677 clocks = <&cpg CPG_MOD 121>;
678 clock-names = "fck";
679 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
680 resets = <&cpg 121>;
681 status = "disabled";
682 };
683
619 i2c0: i2c@e6500000 {
620 #address-cells = <1>;
621 #size-cells = <0>;
622 compatible = "renesas,i2c-r8a7795",
623 "renesas,rcar-gen3-i2c";
624 reg = <0 0xe6500000 0 0x40>;
625 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
626 clocks = <&cpg CPG_MOD 931>;

--- 2754 unchanged lines hidden --- 		684 i2c0: i2c@e6500000 {
685 #address-cells = <1>;
686 #size-cells = <0>;
687 compatible = "renesas,i2c-r8a7795",
688 "renesas,rcar-gen3-i2c";
689 reg = <0 0xe6500000 0 0x40>;
690 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
691 clocks = <&cpg CPG_MOD 931>;

--- 2754 unchanged lines hidden ---