r8a774e1.dtsi (cbb2f09abcd635888508338d4436771fe07688d1) r8a774e1.dtsi (2f3c7323aba207b5cf1e769b8f48ce726531de4a)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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1494 clocks = <&cpg CPG_MOD 311>;
1495 max-frequency = <200000000>;
1496 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1497 resets = <&cpg 311>;
1498 iommus = <&ipmmu_ds1 35>;
1499 status = "disabled";
1500 };
1501
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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1494 clocks = <&cpg CPG_MOD 311>;
1495 max-frequency = <200000000>;
1496 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1497 resets = <&cpg 311>;
1498 iommus = <&ipmmu_ds1 35>;
1499 status = "disabled";
1500 };
1501
1502 sata: sata@ee300000 {
1503 compatible = "renesas,sata-r8a774e1",
1504 "renesas,rcar-gen3-sata";
1505 reg = <0 0xee300000 0 0x200000>;
1506 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1507 clocks = <&cpg CPG_MOD 815>;
1508 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1509 resets = <&cpg 815>;
1510 iommus = <&ipmmu_hc 2>;
1511 status = "disabled";
1512 };
1513
1502 gic: interrupt-controller@f1010000 {
1503 compatible = "arm,gic-400";
1504 #interrupt-cells = <3>;
1505 #address-cells = <0>;
1506 interrupt-controller;
1507 reg = <0x0 0xf1010000 0 0x1000>,
1508 <0x0 0xf1020000 0 0x20000>,
1509 <0x0 0xf1040000 0 0x20000>,

--- 200 unchanged lines hidden --- 		1514 gic: interrupt-controller@f1010000 {
1515 compatible = "arm,gic-400";
1516 #interrupt-cells = <3>;
1517 #address-cells = <0>;
1518 interrupt-controller;
1519 reg = <0x0 0xf1010000 0 0x1000>,
1520 <0x0 0xf1020000 0 0x20000>,
1521 <0x0 0xf1040000 0 0x20000>,

--- 200 unchanged lines hidden ---