r8a774e1.dtsi (9ddb236f13594b34a12dacf69a5adca7a1aef35e) r8a774e1.dtsi (a2053990f3275e715d69c208d8c0040cac0df593)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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122
123 a57_0: cpu@0 {
124 compatible = "arm,cortex-a57";
125 reg = <0x0>;
126 device_type = "cpu";
127 power-domains = <&sysc R8A774E1_PD_CA57_CPU0>;
128 next-level-cache = <&L2_CA57>;
129 enable-method = "psci";
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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122
123 a57_0: cpu@0 {
124 compatible = "arm,cortex-a57";
125 reg = <0x0>;
126 device_type = "cpu";
127 power-domains = <&sysc R8A774E1_PD_CA57_CPU0>;
128 next-level-cache = <&L2_CA57>;
129 enable-method = "psci";
130 cpu-idle-states = <&CPU_SLEEP_0>;
130 dynamic-power-coefficient = <854>;
131 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
132 operating-points-v2 = <&cluster0_opp>;
133 capacity-dmips-mhz = <1024>;
134 #cooling-cells = <2>;
135 };
136
137 a57_1: cpu@1 {
138 compatible = "arm,cortex-a57";
139 reg = <0x1>;
140 device_type = "cpu";
141 power-domains = <&sysc R8A774E1_PD_CA57_CPU1>;
142 next-level-cache = <&L2_CA57>;
143 enable-method = "psci";
131 dynamic-power-coefficient = <854>;
132 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
133 operating-points-v2 = <&cluster0_opp>;
134 capacity-dmips-mhz = <1024>;
135 #cooling-cells = <2>;
136 };
137
138 a57_1: cpu@1 {
139 compatible = "arm,cortex-a57";
140 reg = <0x1>;
141 device_type = "cpu";
142 power-domains = <&sysc R8A774E1_PD_CA57_CPU1>;
143 next-level-cache = <&L2_CA57>;
144 enable-method = "psci";
145 cpu-idle-states = <&CPU_SLEEP_0>;
144 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
145 operating-points-v2 = <&cluster0_opp>;
146 capacity-dmips-mhz = <1024>;
147 #cooling-cells = <2>;
148 };
149
150 a57_2: cpu@2 {
151 compatible = "arm,cortex-a57";
152 reg = <0x2>;
153 device_type = "cpu";
154 power-domains = <&sysc R8A774E1_PD_CA57_CPU2>;
155 next-level-cache = <&L2_CA57>;
156 enable-method = "psci";
146 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
147 operating-points-v2 = <&cluster0_opp>;
148 capacity-dmips-mhz = <1024>;
149 #cooling-cells = <2>;
150 };
151
152 a57_2: cpu@2 {
153 compatible = "arm,cortex-a57";
154 reg = <0x2>;
155 device_type = "cpu";
156 power-domains = <&sysc R8A774E1_PD_CA57_CPU2>;
157 next-level-cache = <&L2_CA57>;
158 enable-method = "psci";
159 cpu-idle-states = <&CPU_SLEEP_0>;
157 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
158 operating-points-v2 = <&cluster0_opp>;
159 capacity-dmips-mhz = <1024>;
160 #cooling-cells = <2>;
161 };
162
163 a57_3: cpu@3 {
164 compatible = "arm,cortex-a57";
165 reg = <0x3>;
166 device_type = "cpu";
167 power-domains = <&sysc R8A774E1_PD_CA57_CPU3>;
168 next-level-cache = <&L2_CA57>;
169 enable-method = "psci";
160 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
161 operating-points-v2 = <&cluster0_opp>;
162 capacity-dmips-mhz = <1024>;
163 #cooling-cells = <2>;
164 };
165
166 a57_3: cpu@3 {
167 compatible = "arm,cortex-a57";
168 reg = <0x3>;
169 device_type = "cpu";
170 power-domains = <&sysc R8A774E1_PD_CA57_CPU3>;
171 next-level-cache = <&L2_CA57>;
172 enable-method = "psci";
173 cpu-idle-states = <&CPU_SLEEP_0>;
170 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
171 operating-points-v2 = <&cluster0_opp>;
172 capacity-dmips-mhz = <1024>;
173 #cooling-cells = <2>;
174 };
175
176 a53_0: cpu@100 {
177 compatible = "arm,cortex-a53";
178 reg = <0x100>;
179 device_type = "cpu";
180 power-domains = <&sysc R8A774E1_PD_CA53_CPU0>;
181 next-level-cache = <&L2_CA53>;
182 enable-method = "psci";
174 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
175 operating-points-v2 = <&cluster0_opp>;
176 capacity-dmips-mhz = <1024>;
177 #cooling-cells = <2>;
178 };
179
180 a53_0: cpu@100 {
181 compatible = "arm,cortex-a53";
182 reg = <0x100>;
183 device_type = "cpu";
184 power-domains = <&sysc R8A774E1_PD_CA53_CPU0>;
185 next-level-cache = <&L2_CA53>;
186 enable-method = "psci";
187 cpu-idle-states = <&CPU_SLEEP_1>;
183 #cooling-cells = <2>;
184 dynamic-power-coefficient = <277>;
185 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
186 operating-points-v2 = <&cluster1_opp>;
187 capacity-dmips-mhz = <535>;
188 };
189
190 a53_1: cpu@101 {
191 compatible = "arm,cortex-a53";
192 reg = <0x101>;
193 device_type = "cpu";
194 power-domains = <&sysc R8A774E1_PD_CA53_CPU1>;
195 next-level-cache = <&L2_CA53>;
196 enable-method = "psci";
188 #cooling-cells = <2>;
189 dynamic-power-coefficient = <277>;
190 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
191 operating-points-v2 = <&cluster1_opp>;
192 capacity-dmips-mhz = <535>;
193 };
194
195 a53_1: cpu@101 {
196 compatible = "arm,cortex-a53";
197 reg = <0x101>;
198 device_type = "cpu";
199 power-domains = <&sysc R8A774E1_PD_CA53_CPU1>;
200 next-level-cache = <&L2_CA53>;
201 enable-method = "psci";
202 cpu-idle-states = <&CPU_SLEEP_1>;
197 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
198 operating-points-v2 = <&cluster1_opp>;
199 capacity-dmips-mhz = <535>;
200 };
201
202 a53_2: cpu@102 {
203 compatible = "arm,cortex-a53";
204 reg = <0x102>;
205 device_type = "cpu";
206 power-domains = <&sysc R8A774E1_PD_CA53_CPU2>;
207 next-level-cache = <&L2_CA53>;
208 enable-method = "psci";
203 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
204 operating-points-v2 = <&cluster1_opp>;
205 capacity-dmips-mhz = <535>;
206 };
207
208 a53_2: cpu@102 {
209 compatible = "arm,cortex-a53";
210 reg = <0x102>;
211 device_type = "cpu";
212 power-domains = <&sysc R8A774E1_PD_CA53_CPU2>;
213 next-level-cache = <&L2_CA53>;
214 enable-method = "psci";
215 cpu-idle-states = <&CPU_SLEEP_1>;
209 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
210 operating-points-v2 = <&cluster1_opp>;
211 capacity-dmips-mhz = <535>;
212 };
213
214 a53_3: cpu@103 {
215 compatible = "arm,cortex-a53";
216 reg = <0x103>;
217 device_type = "cpu";
218 power-domains = <&sysc R8A774E1_PD_CA53_CPU3>;
219 next-level-cache = <&L2_CA53>;
220 enable-method = "psci";
216 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
217 operating-points-v2 = <&cluster1_opp>;
218 capacity-dmips-mhz = <535>;
219 };
220
221 a53_3: cpu@103 {
222 compatible = "arm,cortex-a53";
223 reg = <0x103>;
224 device_type = "cpu";
225 power-domains = <&sysc R8A774E1_PD_CA53_CPU3>;
226 next-level-cache = <&L2_CA53>;
227 enable-method = "psci";
228 cpu-idle-states = <&CPU_SLEEP_1>;
221 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
222 operating-points-v2 = <&cluster1_opp>;
223 capacity-dmips-mhz = <535>;
224 };
225
226 L2_CA57: cache-controller-0 {
227 compatible = "cache";
228 power-domains = <&sysc R8A774E1_PD_CA57_SCU>;
229 cache-unified;
230 cache-level = <2>;
231 };
232
233 L2_CA53: cache-controller-1 {
234 compatible = "cache";
235 power-domains = <&sysc R8A774E1_PD_CA53_SCU>;
236 cache-unified;
237 cache-level = <2>;
238 };
229 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
230 operating-points-v2 = <&cluster1_opp>;
231 capacity-dmips-mhz = <535>;
232 };
233
234 L2_CA57: cache-controller-0 {
235 compatible = "cache";
236 power-domains = <&sysc R8A774E1_PD_CA57_SCU>;
237 cache-unified;
238 cache-level = <2>;
239 };
240
241 L2_CA53: cache-controller-1 {
242 compatible = "cache";
243 power-domains = <&sysc R8A774E1_PD_CA53_SCU>;
244 cache-unified;
245 cache-level = <2>;
246 };
247
248 idle-states {
249 entry-method = "psci";
250
251 CPU_SLEEP_0: cpu-sleep-0 {
252 compatible = "arm,idle-state";
253 arm,psci-suspend-param = <0x0010000>;
254 local-timer-stop;
255 entry-latency-us = <400>;
256 exit-latency-us = <500>;
257 min-residency-us = <4000>;
258 };
259
260 CPU_SLEEP_1: cpu-sleep-1 {
261 compatible = "arm,idle-state";
262 arm,psci-suspend-param = <0x0010000>;
263 local-timer-stop;
264 entry-latency-us = <700>;
265 exit-latency-us = <700>;
266 min-residency-us = <5000>;
267 };
268 };
239 };
240
241 extal_clk: extal {
242 compatible = "fixed-clock";
243 #clock-cells = <0>;
244 /* This value must be overridden by the board */
245 clock-frequency = <0>;
246 };

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422 gpio-ranges = <&pfc 0 224 4>;
423 #interrupt-cells = <2>;
424 interrupt-controller;
425 clocks = <&cpg CPG_MOD 905>;
426 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
427 resets = <&cpg 905>;
428 };
429
269 };
270
271 extal_clk: extal {
272 compatible = "fixed-clock";
273 #clock-cells = <0>;
274 /* This value must be overridden by the board */
275 clock-frequency = <0>;
276 };

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452 gpio-ranges = <&pfc 0 224 4>;
453 #interrupt-cells = <2>;
454 interrupt-controller;
455 clocks = <&cpg CPG_MOD 905>;
456 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
457 resets = <&cpg 905>;
458 };
459
430 pfc: pin-controller@e6060000 {
460 pfc: pinctrl@e6060000 {
431 compatible = "renesas,pfc-r8a774e1";
432 reg = <0 0xe6060000 0 0x50c>;
433 };
434
435 cmt0: timer@e60f0000 {
436 compatible = "renesas,r8a774e1-cmt0",
437 "renesas,rcar-gen3-cmt0";
438 reg = <0 0xe60f0000 0 0x1004>;

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833 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
834 dma-names = "tx", "rx";
835 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
836 resets = <&cpg 516>;
837 status = "disabled";
838 };
839
840 hsusb: usb@e6590000 {
461 compatible = "renesas,pfc-r8a774e1";
462 reg = <0 0xe6060000 0 0x50c>;
463 };
464
465 cmt0: timer@e60f0000 {
466 compatible = "renesas,r8a774e1-cmt0",
467 "renesas,rcar-gen3-cmt0";
468 reg = <0 0xe60f0000 0 0x1004>;

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863 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
864 dma-names = "tx", "rx";
865 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
866 resets = <&cpg 516>;
867 status = "disabled";
868 };
869
870 hsusb: usb@e6590000 {
871 compatible = "renesas,usbhs-r8a774e1",
872 "renesas,rcar-gen3-usbhs";
841 reg = <0 0xe6590000 0 0x200>;
873 reg = <0 0xe6590000 0 0x200>;
874 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
875 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
876 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
877 <&usb_dmac1 0>, <&usb_dmac1 1>;
878 dma-names = "ch0", "ch1", "ch2", "ch3";
879 renesas,buswait = <11>;
880 phys = <&usb2_phy0 3>;
881 phy-names = "usb";
882 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
883 resets = <&cpg 704>, <&cpg 703>;
842 status = "disabled";
884 status = "disabled";
885 };
843
886
844 /* placeholder */
887 usb_dmac0: dma-controller@e65a0000 {
888 compatible = "renesas,r8a774e1-usb-dmac",
889 "renesas,usb-dmac";
890 reg = <0 0xe65a0000 0 0x100>;
891 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
892 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
893 interrupt-names = "ch0", "ch1";
894 clocks = <&cpg CPG_MOD 330>;
895 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
896 resets = <&cpg 330>;
897 #dma-cells = <1>;
898 dma-channels = <2>;
845 };
846
899 };
900
901 usb_dmac1: dma-controller@e65b0000 {
902 compatible = "renesas,r8a774e1-usb-dmac",
903 "renesas,usb-dmac";
904 reg = <0 0xe65b0000 0 0x100>;
905 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
906 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
907 interrupt-names = "ch0", "ch1";
908 clocks = <&cpg CPG_MOD 331>;
909 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
910 resets = <&cpg 331>;
911 #dma-cells = <1>;
912 dma-channels = <2>;
913 };
914
847 usb3_phy0: usb-phy@e65ee000 {
915 usb3_phy0: usb-phy@e65ee000 {
916 compatible = "renesas,r8a774e1-usb3-phy",
917 "renesas,rcar-gen3-usb3-phy";
848 reg = <0 0xe65ee000 0 0x90>;
918 reg = <0 0xe65ee000 0 0x90>;
919 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
920 <&usb_extal_clk>;
921 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
922 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
923 resets = <&cpg 328>;
849 #phy-cells = <0>;
850 status = "disabled";
924 #phy-cells = <0>;
925 status = "disabled";
851
852 /* placeholder */
853 };
854
855 dmac0: dma-controller@e6700000 {
856 compatible = "renesas,dmac-r8a774e1",
857 "renesas,rcar-dmac";
858 reg = <0 0xe6700000 0 0x10000>;
859 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
860 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,

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1198 };
1199
1200 channel1 {
1201 status = "disabled";
1202 };
1203 };
1204
1205 pwm0: pwm@e6e30000 {
926 };
927
928 dmac0: dma-controller@e6700000 {
929 compatible = "renesas,dmac-r8a774e1",
930 "renesas,rcar-dmac";
931 reg = <0 0xe6700000 0 0x10000>;
932 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
933 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,

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1271 };
1272
1273 channel1 {
1274 status = "disabled";
1275 };
1276 };
1277
1278 pwm0: pwm@e6e30000 {
1279 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1206 reg = <0 0xe6e30000 0 0x8>;
1280 reg = <0 0xe6e30000 0 0x8>;
1281 clocks = <&cpg CPG_MOD 523>;
1282 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1283 resets = <&cpg 523>;
1207 #pwm-cells = <2>;
1208 status = "disabled";
1284 #pwm-cells = <2>;
1285 status = "disabled";
1286 };
1209
1287
1210 /* placeholder */
1288 pwm1: pwm@e6e31000 {
1289 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1290 reg = <0 0xe6e31000 0 0x8>;
1291 clocks = <&cpg CPG_MOD 523>;
1292 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1293 resets = <&cpg 523>;
1294 #pwm-cells = <2>;
1295 status = "disabled";
1211 };
1212
1296 };
1297
1298 pwm2: pwm@e6e32000 {
1299 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1300 reg = <0 0xe6e32000 0 0x8>;
1301 clocks = <&cpg CPG_MOD 523>;
1302 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1303 resets = <&cpg 523>;
1304 #pwm-cells = <2>;
1305 status = "disabled";
1306 };
1307
1308 pwm3: pwm@e6e33000 {
1309 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1310 reg = <0 0xe6e33000 0 0x8>;
1311 clocks = <&cpg CPG_MOD 523>;
1312 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1313 resets = <&cpg 523>;
1314 #pwm-cells = <2>;
1315 status = "disabled";
1316 };
1317
1318 pwm4: pwm@e6e34000 {
1319 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1320 reg = <0 0xe6e34000 0 0x8>;
1321 clocks = <&cpg CPG_MOD 523>;
1322 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1323 resets = <&cpg 523>;
1324 #pwm-cells = <2>;
1325 status = "disabled";
1326 };
1327
1328 pwm5: pwm@e6e35000 {
1329 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1330 reg = <0 0xe6e35000 0 0x8>;
1331 clocks = <&cpg CPG_MOD 523>;
1332 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1333 resets = <&cpg 523>;
1334 #pwm-cells = <2>;
1335 status = "disabled";
1336 };
1337
1338 pwm6: pwm@e6e36000 {
1339 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1340 reg = <0 0xe6e36000 0 0x8>;
1341 clocks = <&cpg CPG_MOD 523>;
1342 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1343 resets = <&cpg 523>;
1344 #pwm-cells = <2>;
1345 status = "disabled";
1346 };
1347
1213 scif0: serial@e6e60000 {
1214 compatible = "renesas,scif-r8a774e1",
1215 "renesas,rcar-gen3-scif", "renesas,scif";
1216 reg = <0 0xe6e60000 0 0x40>;
1217 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1218 clocks = <&cpg CPG_MOD 207>,
1219 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1220 <&scif_clk>;

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1367 dma-names = "tx", "rx";
1368 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1369 resets = <&cpg 208>;
1370 #address-cells = <1>;
1371 #size-cells = <0>;
1372 status = "disabled";
1373 };
1374
1348 scif0: serial@e6e60000 {
1349 compatible = "renesas,scif-r8a774e1",
1350 "renesas,rcar-gen3-scif", "renesas,scif";
1351 reg = <0 0xe6e60000 0 0x40>;
1352 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1353 clocks = <&cpg CPG_MOD 207>,
1354 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1355 <&scif_clk>;

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1502 dma-names = "tx", "rx";
1503 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1504 resets = <&cpg 208>;
1505 #address-cells = <1>;
1506 #size-cells = <0>;
1507 status = "disabled";
1508 };
1509
1510 vin0: video@e6ef0000 {
1511 compatible = "renesas,vin-r8a774e1";
1512 reg = <0 0xe6ef0000 0 0x1000>;
1513 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1514 clocks = <&cpg CPG_MOD 811>;
1515 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1516 resets = <&cpg 811>;
1517 renesas,id = <0>;
1518 status = "disabled";
1519
1520 ports {
1521 #address-cells = <1>;
1522 #size-cells = <0>;
1523
1524 port@1 {
1525 #address-cells = <1>;
1526 #size-cells = <0>;
1527
1528 reg = <1>;
1529
1530 vin0csi20: endpoint@0 {
1531 reg = <0>;
1532 remote-endpoint = <&csi20vin0>;
1533 };
1534 vin0csi40: endpoint@2 {
1535 reg = <2>;
1536 remote-endpoint = <&csi40vin0>;
1537 };
1538 };
1539 };
1540 };
1541
1542 vin1: video@e6ef1000 {
1543 compatible = "renesas,vin-r8a774e1";
1544 reg = <0 0xe6ef1000 0 0x1000>;
1545 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1546 clocks = <&cpg CPG_MOD 810>;
1547 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1548 resets = <&cpg 810>;
1549 renesas,id = <1>;
1550 status = "disabled";
1551
1552 ports {
1553 #address-cells = <1>;
1554 #size-cells = <0>;
1555
1556 port@1 {
1557 #address-cells = <1>;
1558 #size-cells = <0>;
1559
1560 reg = <1>;
1561
1562 vin1csi20: endpoint@0 {
1563 reg = <0>;
1564 remote-endpoint = <&csi20vin1>;
1565 };
1566 vin1csi40: endpoint@2 {
1567 reg = <2>;
1568 remote-endpoint = <&csi40vin1>;
1569 };
1570 };
1571 };
1572 };
1573
1574 vin2: video@e6ef2000 {
1575 compatible = "renesas,vin-r8a774e1";
1576 reg = <0 0xe6ef2000 0 0x1000>;
1577 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1578 clocks = <&cpg CPG_MOD 809>;
1579 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1580 resets = <&cpg 809>;
1581 renesas,id = <2>;
1582 status = "disabled";
1583
1584 ports {
1585 #address-cells = <1>;
1586 #size-cells = <0>;
1587
1588 port@1 {
1589 #address-cells = <1>;
1590 #size-cells = <0>;
1591
1592 reg = <1>;
1593
1594 vin2csi20: endpoint@0 {
1595 reg = <0>;
1596 remote-endpoint = <&csi20vin2>;
1597 };
1598 vin2csi40: endpoint@2 {
1599 reg = <2>;
1600 remote-endpoint = <&csi40vin2>;
1601 };
1602 };
1603 };
1604 };
1605
1606 vin3: video@e6ef3000 {
1607 compatible = "renesas,vin-r8a774e1";
1608 reg = <0 0xe6ef3000 0 0x1000>;
1609 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1610 clocks = <&cpg CPG_MOD 808>;
1611 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1612 resets = <&cpg 808>;
1613 renesas,id = <3>;
1614 status = "disabled";
1615
1616 ports {
1617 #address-cells = <1>;
1618 #size-cells = <0>;
1619
1620 port@1 {
1621 #address-cells = <1>;
1622 #size-cells = <0>;
1623
1624 reg = <1>;
1625
1626 vin3csi20: endpoint@0 {
1627 reg = <0>;
1628 remote-endpoint = <&csi20vin3>;
1629 };
1630 vin3csi40: endpoint@2 {
1631 reg = <2>;
1632 remote-endpoint = <&csi40vin3>;
1633 };
1634 };
1635 };
1636 };
1637
1638 vin4: video@e6ef4000 {
1639 compatible = "renesas,vin-r8a774e1";
1640 reg = <0 0xe6ef4000 0 0x1000>;
1641 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1642 clocks = <&cpg CPG_MOD 807>;
1643 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1644 resets = <&cpg 807>;
1645 renesas,id = <4>;
1646 status = "disabled";
1647
1648 ports {
1649 #address-cells = <1>;
1650 #size-cells = <0>;
1651
1652 port@1 {
1653 #address-cells = <1>;
1654 #size-cells = <0>;
1655
1656 reg = <1>;
1657
1658 vin4csi20: endpoint@0 {
1659 reg = <0>;
1660 remote-endpoint = <&csi20vin4>;
1661 };
1662 };
1663 };
1664 };
1665
1666 vin5: video@e6ef5000 {
1667 compatible = "renesas,vin-r8a774e1";
1668 reg = <0 0xe6ef5000 0 0x1000>;
1669 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1670 clocks = <&cpg CPG_MOD 806>;
1671 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1672 resets = <&cpg 806>;
1673 renesas,id = <5>;
1674 status = "disabled";
1675
1676 ports {
1677 #address-cells = <1>;
1678 #size-cells = <0>;
1679
1680 port@1 {
1681 #address-cells = <1>;
1682 #size-cells = <0>;
1683
1684 reg = <1>;
1685
1686 vin5csi20: endpoint@0 {
1687 reg = <0>;
1688 remote-endpoint = <&csi20vin5>;
1689 };
1690 };
1691 };
1692 };
1693
1694 vin6: video@e6ef6000 {
1695 compatible = "renesas,vin-r8a774e1";
1696 reg = <0 0xe6ef6000 0 0x1000>;
1697 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1698 clocks = <&cpg CPG_MOD 805>;
1699 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1700 resets = <&cpg 805>;
1701 renesas,id = <6>;
1702 status = "disabled";
1703
1704 ports {
1705 #address-cells = <1>;
1706 #size-cells = <0>;
1707
1708 port@1 {
1709 #address-cells = <1>;
1710 #size-cells = <0>;
1711
1712 reg = <1>;
1713
1714 vin6csi20: endpoint@0 {
1715 reg = <0>;
1716 remote-endpoint = <&csi20vin6>;
1717 };
1718 };
1719 };
1720 };
1721
1722 vin7: video@e6ef7000 {
1723 compatible = "renesas,vin-r8a774e1";
1724 reg = <0 0xe6ef7000 0 0x1000>;
1725 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1726 clocks = <&cpg CPG_MOD 804>;
1727 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1728 resets = <&cpg 804>;
1729 renesas,id = <7>;
1730 status = "disabled";
1731
1732 ports {
1733 #address-cells = <1>;
1734 #size-cells = <0>;
1735
1736 port@1 {
1737 #address-cells = <1>;
1738 #size-cells = <0>;
1739
1740 reg = <1>;
1741
1742 vin7csi20: endpoint@0 {
1743 reg = <0>;
1744 remote-endpoint = <&csi20vin7>;
1745 };
1746 };
1747 };
1748 };
1749
1375 rcar_sound: sound@ec500000 {
1750 rcar_sound: sound@ec500000 {
1751 /*
1752 * #sound-dai-cells is required
1753 *
1754 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1755 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1756 */
1757 /*
1758 * #clock-cells is required for audio_clkout0/1/2/3
1759 *
1760 * clkout : #clock-cells = <0>; <&rcar_sound>;
1761 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1762 */
1763 compatible = "renesas,rcar_sound-r8a774e1", "renesas,rcar_sound-gen3";
1376 reg = <0 0xec500000 0 0x1000>, /* SCU */
1377 <0 0xec5a0000 0 0x100>, /* ADG */
1378 <0 0xec540000 0 0x1000>, /* SSIU */
1379 <0 0xec541000 0 0x280>, /* SSI */
1380 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1381 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1382
1764 reg = <0 0xec500000 0 0x1000>, /* SCU */
1765 <0 0xec5a0000 0 0x100>, /* ADG */
1766 <0 0xec540000 0 0x1000>, /* SSIU */
1767 <0 0xec541000 0 0x280>, /* SSI */
1768 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1769 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1770
1771 clocks = <&cpg CPG_MOD 1005>,
1772 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1773 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1774 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1775 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1776 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1777 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1778 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1779 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1780 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1781 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1782 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1783 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1784 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1785 <&audio_clk_a>, <&audio_clk_b>,
1786 <&audio_clk_c>,
1787 <&cpg CPG_CORE R8A774E1_CLK_S0D4>;
1788 clock-names = "ssi-all",
1789 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1790 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1791 "ssi.1", "ssi.0",
1792 "src.9", "src.8", "src.7", "src.6",
1793 "src.5", "src.4", "src.3", "src.2",
1794 "src.1", "src.0",
1795 "mix.1", "mix.0",
1796 "ctu.1", "ctu.0",
1797 "dvc.0", "dvc.1",
1798 "clk_a", "clk_b", "clk_c", "clk_i";
1799 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1800 resets = <&cpg 1005>,
1801 <&cpg 1006>, <&cpg 1007>,
1802 <&cpg 1008>, <&cpg 1009>,
1803 <&cpg 1010>, <&cpg 1011>,
1804 <&cpg 1012>, <&cpg 1013>,
1805 <&cpg 1014>, <&cpg 1015>;
1806 reset-names = "ssi-all",
1807 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1808 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1809 "ssi.1", "ssi.0";
1383 status = "disabled";
1384
1810 status = "disabled";
1811
1385 /* placeholder */
1812 rcar_sound,dvc {
1813 dvc0: dvc-0 {
1814 dmas = <&audma1 0xbc>;
1815 dma-names = "tx";
1816 };
1817 dvc1: dvc-1 {
1818 dmas = <&audma1 0xbe>;
1819 dma-names = "tx";
1820 };
1821 };
1386
1822
1823 rcar_sound,mix {
1824 mix0: mix-0 { };
1825 mix1: mix-1 { };
1826 };
1827
1828 rcar_sound,ctu {
1829 ctu00: ctu-0 { };
1830 ctu01: ctu-1 { };
1831 ctu02: ctu-2 { };
1832 ctu03: ctu-3 { };
1833 ctu10: ctu-4 { };
1834 ctu11: ctu-5 { };
1835 ctu12: ctu-6 { };
1836 ctu13: ctu-7 { };
1837 };
1838
1839 rcar_sound,src {
1840 src0: src-0 {
1841 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1842 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1843 dma-names = "rx", "tx";
1844 };
1845 src1: src-1 {
1846 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1847 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1848 dma-names = "rx", "tx";
1849 };
1850 src2: src-2 {
1851 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1852 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1853 dma-names = "rx", "tx";
1854 };
1855 src3: src-3 {
1856 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1857 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1858 dma-names = "rx", "tx";
1859 };
1860 src4: src-4 {
1861 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1862 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1863 dma-names = "rx", "tx";
1864 };
1865 src5: src-5 {
1866 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1867 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1868 dma-names = "rx", "tx";
1869 };
1870 src6: src-6 {
1871 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1872 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1873 dma-names = "rx", "tx";
1874 };
1875 src7: src-7 {
1876 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1877 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1878 dma-names = "rx", "tx";
1879 };
1880 src8: src-8 {
1881 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1882 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1883 dma-names = "rx", "tx";
1884 };
1885 src9: src-9 {
1886 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1887 dmas = <&audma0 0x97>, <&audma1 0xba>;
1888 dma-names = "rx", "tx";
1889 };
1890 };
1891
1892 rcar_sound,ssiu {
1893 ssiu00: ssiu-0 {
1894 dmas = <&audma0 0x15>, <&audma1 0x16>;
1895 dma-names = "rx", "tx";
1896 };
1897 ssiu01: ssiu-1 {
1898 dmas = <&audma0 0x35>, <&audma1 0x36>;
1899 dma-names = "rx", "tx";
1900 };
1901 ssiu02: ssiu-2 {
1902 dmas = <&audma0 0x37>, <&audma1 0x38>;
1903 dma-names = "rx", "tx";
1904 };
1905 ssiu03: ssiu-3 {
1906 dmas = <&audma0 0x47>, <&audma1 0x48>;
1907 dma-names = "rx", "tx";
1908 };
1909 ssiu04: ssiu-4 {
1910 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1911 dma-names = "rx", "tx";
1912 };
1913 ssiu05: ssiu-5 {
1914 dmas = <&audma0 0x43>, <&audma1 0x44>;
1915 dma-names = "rx", "tx";
1916 };
1917 ssiu06: ssiu-6 {
1918 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1919 dma-names = "rx", "tx";
1920 };
1921 ssiu07: ssiu-7 {
1922 dmas = <&audma0 0x53>, <&audma1 0x54>;
1923 dma-names = "rx", "tx";
1924 };
1925 ssiu10: ssiu-8 {
1926 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1927 dma-names = "rx", "tx";
1928 };
1929 ssiu11: ssiu-9 {
1930 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1931 dma-names = "rx", "tx";
1932 };
1933 ssiu12: ssiu-10 {
1934 dmas = <&audma0 0x57>, <&audma1 0x58>;
1935 dma-names = "rx", "tx";
1936 };
1937 ssiu13: ssiu-11 {
1938 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1939 dma-names = "rx", "tx";
1940 };
1941 ssiu14: ssiu-12 {
1942 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1943 dma-names = "rx", "tx";
1944 };
1945 ssiu15: ssiu-13 {
1946 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1947 dma-names = "rx", "tx";
1948 };
1949 ssiu16: ssiu-14 {
1950 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1951 dma-names = "rx", "tx";
1952 };
1953 ssiu17: ssiu-15 {
1954 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1955 dma-names = "rx", "tx";
1956 };
1957 ssiu20: ssiu-16 {
1958 dmas = <&audma0 0x63>, <&audma1 0x64>;
1959 dma-names = "rx", "tx";
1960 };
1961 ssiu21: ssiu-17 {
1962 dmas = <&audma0 0x67>, <&audma1 0x68>;
1963 dma-names = "rx", "tx";
1964 };
1965 ssiu22: ssiu-18 {
1966 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1967 dma-names = "rx", "tx";
1968 };
1969 ssiu23: ssiu-19 {
1970 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1971 dma-names = "rx", "tx";
1972 };
1973 ssiu24: ssiu-20 {
1974 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1975 dma-names = "rx", "tx";
1976 };
1977 ssiu25: ssiu-21 {
1978 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1979 dma-names = "rx", "tx";
1980 };
1981 ssiu26: ssiu-22 {
1982 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1983 dma-names = "rx", "tx";
1984 };
1985 ssiu27: ssiu-23 {
1986 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1987 dma-names = "rx", "tx";
1988 };
1989 ssiu30: ssiu-24 {
1990 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1991 dma-names = "rx", "tx";
1992 };
1993 ssiu31: ssiu-25 {
1994 dmas = <&audma0 0x21>, <&audma1 0x22>;
1995 dma-names = "rx", "tx";
1996 };
1997 ssiu32: ssiu-26 {
1998 dmas = <&audma0 0x23>, <&audma1 0x24>;
1999 dma-names = "rx", "tx";
2000 };
2001 ssiu33: ssiu-27 {
2002 dmas = <&audma0 0x25>, <&audma1 0x26>;
2003 dma-names = "rx", "tx";
2004 };
2005 ssiu34: ssiu-28 {
2006 dmas = <&audma0 0x27>, <&audma1 0x28>;
2007 dma-names = "rx", "tx";
2008 };
2009 ssiu35: ssiu-29 {
2010 dmas = <&audma0 0x29>, <&audma1 0x2A>;
2011 dma-names = "rx", "tx";
2012 };
2013 ssiu36: ssiu-30 {
2014 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2015 dma-names = "rx", "tx";
2016 };
2017 ssiu37: ssiu-31 {
2018 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2019 dma-names = "rx", "tx";
2020 };
2021 ssiu40: ssiu-32 {
2022 dmas = <&audma0 0x71>, <&audma1 0x72>;
2023 dma-names = "rx", "tx";
2024 };
2025 ssiu41: ssiu-33 {
2026 dmas = <&audma0 0x17>, <&audma1 0x18>;
2027 dma-names = "rx", "tx";
2028 };
2029 ssiu42: ssiu-34 {
2030 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2031 dma-names = "rx", "tx";
2032 };
2033 ssiu43: ssiu-35 {
2034 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2035 dma-names = "rx", "tx";
2036 };
2037 ssiu44: ssiu-36 {
2038 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2039 dma-names = "rx", "tx";
2040 };
2041 ssiu45: ssiu-37 {
2042 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2043 dma-names = "rx", "tx";
2044 };
2045 ssiu46: ssiu-38 {
2046 dmas = <&audma0 0x31>, <&audma1 0x32>;
2047 dma-names = "rx", "tx";
2048 };
2049 ssiu47: ssiu-39 {
2050 dmas = <&audma0 0x33>, <&audma1 0x34>;
2051 dma-names = "rx", "tx";
2052 };
2053 ssiu50: ssiu-40 {
2054 dmas = <&audma0 0x73>, <&audma1 0x74>;
2055 dma-names = "rx", "tx";
2056 };
2057 ssiu60: ssiu-41 {
2058 dmas = <&audma0 0x75>, <&audma1 0x76>;
2059 dma-names = "rx", "tx";
2060 };
2061 ssiu70: ssiu-42 {
2062 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2063 dma-names = "rx", "tx";
2064 };
2065 ssiu80: ssiu-43 {
2066 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2067 dma-names = "rx", "tx";
2068 };
2069 ssiu90: ssiu-44 {
2070 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2071 dma-names = "rx", "tx";
2072 };
2073 ssiu91: ssiu-45 {
2074 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2075 dma-names = "rx", "tx";
2076 };
2077 ssiu92: ssiu-46 {
2078 dmas = <&audma0 0x81>, <&audma1 0x82>;
2079 dma-names = "rx", "tx";
2080 };
2081 ssiu93: ssiu-47 {
2082 dmas = <&audma0 0x83>, <&audma1 0x84>;
2083 dma-names = "rx", "tx";
2084 };
2085 ssiu94: ssiu-48 {
2086 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2087 dma-names = "rx", "tx";
2088 };
2089 ssiu95: ssiu-49 {
2090 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2091 dma-names = "rx", "tx";
2092 };
2093 ssiu96: ssiu-50 {
2094 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2095 dma-names = "rx", "tx";
2096 };
2097 ssiu97: ssiu-51 {
2098 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2099 dma-names = "rx", "tx";
2100 };
2101 };
2102
1387 rcar_sound,ssi {
2103 rcar_sound,ssi {
2104 ssi0: ssi-0 {
2105 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2106 dmas = <&audma0 0x01>, <&audma1 0x02>;
2107 dma-names = "rx", "tx";
2108 };
2109 ssi1: ssi-1 {
2110 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2111 dmas = <&audma0 0x03>, <&audma1 0x04>;
2112 dma-names = "rx", "tx";
2113 };
1388 ssi2: ssi-2 {
2114 ssi2: ssi-2 {
1389 /* placeholder */
2115 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2116 dmas = <&audma0 0x05>, <&audma1 0x06>;
2117 dma-names = "rx", "tx";
1390 };
2118 };
2119 ssi3: ssi-3 {
2120 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2121 dmas = <&audma0 0x07>, <&audma1 0x08>;
2122 dma-names = "rx", "tx";
2123 };
2124 ssi4: ssi-4 {
2125 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2126 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2127 dma-names = "rx", "tx";
2128 };
2129 ssi5: ssi-5 {
2130 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2131 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2132 dma-names = "rx", "tx";
2133 };
2134 ssi6: ssi-6 {
2135 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2136 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2137 dma-names = "rx", "tx";
2138 };
2139 ssi7: ssi-7 {
2140 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2141 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2142 dma-names = "rx", "tx";
2143 };
2144 ssi8: ssi-8 {
2145 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2146 dmas = <&audma0 0x11>, <&audma1 0x12>;
2147 dma-names = "rx", "tx";
2148 };
2149 ssi9: ssi-9 {
2150 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2151 dmas = <&audma0 0x13>, <&audma1 0x14>;
2152 dma-names = "rx", "tx";
2153 };
1391 };
1392 };
1393
2154 };
2155 };
2156
2157 audma0: dma-controller@ec700000 {
2158 compatible = "renesas,dmac-r8a774e1",
2159 "renesas,rcar-dmac";
2160 reg = <0 0xec700000 0 0x10000>;
2161 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2162 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2163 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2164 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2165 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2166 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2167 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2168 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2169 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2170 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2171 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2172 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2173 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2174 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2175 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2176 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2177 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2178 interrupt-names = "error",
2179 "ch0", "ch1", "ch2", "ch3",
2180 "ch4", "ch5", "ch6", "ch7",
2181 "ch8", "ch9", "ch10", "ch11",
2182 "ch12", "ch13", "ch14", "ch15";
2183 clocks = <&cpg CPG_MOD 502>;
2184 clock-names = "fck";
2185 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2186 resets = <&cpg 502>;
2187 #dma-cells = <1>;
2188 dma-channels = <16>;
2189 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2190 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
2191 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
2192 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
2193 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
2194 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
2195 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
2196 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
2197 };
2198
2199 audma1: dma-controller@ec720000 {
2200 compatible = "renesas,dmac-r8a774e1",
2201 "renesas,rcar-dmac";
2202 reg = <0 0xec720000 0 0x10000>;
2203 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2204 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2205 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2206 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2207 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2208 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2209 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2210 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2211 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2212 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2213 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2214 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2215 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2216 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2217 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2218 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2219 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2220 interrupt-names = "error",
2221 "ch0", "ch1", "ch2", "ch3",
2222 "ch4", "ch5", "ch6", "ch7",
2223 "ch8", "ch9", "ch10", "ch11",
2224 "ch12", "ch13", "ch14", "ch15";
2225 clocks = <&cpg CPG_MOD 501>;
2226 clock-names = "fck";
2227 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2228 resets = <&cpg 501>;
2229 #dma-cells = <1>;
2230 dma-channels = <16>;
2231 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
2232 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
2233 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
2234 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
2235 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
2236 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
2237 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
2238 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
2239 };
2240
1394 xhci0: usb@ee000000 {
2241 xhci0: usb@ee000000 {
2242 compatible = "renesas,xhci-r8a774e1",
2243 "renesas,rcar-gen3-xhci";
1395 reg = <0 0xee000000 0 0xc00>;
2244 reg = <0 0xee000000 0 0xc00>;
2245 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2246 clocks = <&cpg CPG_MOD 328>;
2247 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2248 resets = <&cpg 328>;
1396 status = "disabled";
2249 status = "disabled";
1397
1398 /* placeholder */
1399 };
1400
1401 usb3_peri0: usb@ee020000 {
2250 };
2251
2252 usb3_peri0: usb@ee020000 {
2253 compatible = "renesas,r8a774e1-usb3-peri",
2254 "renesas,rcar-gen3-usb3-peri";
1402 reg = <0 0xee020000 0 0x400>;
2255 reg = <0 0xee020000 0 0x400>;
2256 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2257 clocks = <&cpg CPG_MOD 328>;
2258 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2259 resets = <&cpg 328>;
1403 status = "disabled";
2260 status = "disabled";
1404
1405 /* placeholder */
1406 };
1407
1408 ohci0: usb@ee080000 {
2261 };
2262
2263 ohci0: usb@ee080000 {
2264 compatible = "generic-ohci";
1409 reg = <0 0xee080000 0 0x100>;
2265 reg = <0 0xee080000 0 0x100>;
2266 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2267 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2268 phys = <&usb2_phy0 1>;
2269 phy-names = "usb";
2270 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2271 resets = <&cpg 703>, <&cpg 704>;
1410 status = "disabled";
2272 status = "disabled";
1411
1412 /* placeholder */
1413 };
1414
1415 ohci1: usb@ee0a0000 {
2273 };
2274
2275 ohci1: usb@ee0a0000 {
2276 compatible = "generic-ohci";
1416 reg = <0 0xee0a0000 0 0x100>;
2277 reg = <0 0xee0a0000 0 0x100>;
2278 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2279 clocks = <&cpg CPG_MOD 702>;
2280 phys = <&usb2_phy1 1>;
2281 phy-names = "usb";
2282 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2283 resets = <&cpg 702>;
1417 status = "disabled";
2284 status = "disabled";
1418
1419 /* placeholder */
1420 };
1421
1422 ehci0: usb@ee080100 {
2285 };
2286
2287 ehci0: usb@ee080100 {
2288 compatible = "generic-ehci";
1423 reg = <0 0xee080100 0 0x100>;
2289 reg = <0 0xee080100 0 0x100>;
2290 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2291 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2292 phys = <&usb2_phy0 2>;
2293 phy-names = "usb";
2294 companion = <&ohci0>;
2295 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2296 resets = <&cpg 703>, <&cpg 704>;
1424 status = "disabled";
2297 status = "disabled";
1425
1426 /* placeholder */
1427 };
1428
1429 ehci1: usb@ee0a0100 {
2298 };
2299
2300 ehci1: usb@ee0a0100 {
2301 compatible = "generic-ehci";
1430 reg = <0 0xee0a0100 0 0x100>;
2302 reg = <0 0xee0a0100 0 0x100>;
2303 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2304 clocks = <&cpg CPG_MOD 702>;
2305 phys = <&usb2_phy1 2>;
2306 phy-names = "usb";
2307 companion = <&ohci1>;
2308 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2309 resets = <&cpg 702>;
1431 status = "disabled";
2310 status = "disabled";
1432
1433 /* placeholder */
1434 };
1435
1436 usb2_phy0: usb-phy@ee080200 {
2311 };
2312
2313 usb2_phy0: usb-phy@ee080200 {
2314 compatible = "renesas,usb2-phy-r8a774e1",
2315 "renesas,rcar-gen3-usb2-phy";
1437 reg = <0 0xee080200 0 0x700>;
2316 reg = <0 0xee080200 0 0x700>;
2317 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2318 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2319 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2320 resets = <&cpg 703>, <&cpg 704>;
2321 #phy-cells = <1>;
1438 status = "disabled";
2322 status = "disabled";
1439
1440 /* placeholder */
1441 };
1442
1443 usb2_phy1: usb-phy@ee0a0200 {
2323 };
2324
2325 usb2_phy1: usb-phy@ee0a0200 {
2326 compatible = "renesas,usb2-phy-r8a774e1",
2327 "renesas,rcar-gen3-usb2-phy";
1444 reg = <0 0xee0a0200 0 0x700>;
2328 reg = <0 0xee0a0200 0 0x700>;
2329 clocks = <&cpg CPG_MOD 702>;
2330 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2331 resets = <&cpg 702>;
2332 #phy-cells = <1>;
1445 status = "disabled";
2333 status = "disabled";
1446
1447 /* placeholder */
1448 };
1449
1450 sdhi0: mmc@ee100000 {
1451 compatible = "renesas,sdhi-r8a774e1",
1452 "renesas,rcar-gen3-sdhi";
1453 reg = <0 0xee100000 0 0x2000>;
1454 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1455 clocks = <&cpg CPG_MOD 314>;

--- 38 unchanged lines hidden (view full) ---

1494 clocks = <&cpg CPG_MOD 311>;
1495 max-frequency = <200000000>;
1496 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1497 resets = <&cpg 311>;
1498 iommus = <&ipmmu_ds1 35>;
1499 status = "disabled";
1500 };
1501
2334 };
2335
2336 sdhi0: mmc@ee100000 {
2337 compatible = "renesas,sdhi-r8a774e1",
2338 "renesas,rcar-gen3-sdhi";
2339 reg = <0 0xee100000 0 0x2000>;
2340 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2341 clocks = <&cpg CPG_MOD 314>;

--- 38 unchanged lines hidden (view full) ---

2380 clocks = <&cpg CPG_MOD 311>;
2381 max-frequency = <200000000>;
2382 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2383 resets = <&cpg 311>;
2384 iommus = <&ipmmu_ds1 35>;
2385 status = "disabled";
2386 };
2387
2388 sata: sata@ee300000 {
2389 compatible = "renesas,sata-r8a774e1",
2390 "renesas,rcar-gen3-sata";
2391 reg = <0 0xee300000 0 0x200000>;
2392 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2393 clocks = <&cpg CPG_MOD 815>;
2394 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2395 resets = <&cpg 815>;
2396 iommus = <&ipmmu_hc 2>;
2397 status = "disabled";
2398 };
2399
1502 gic: interrupt-controller@f1010000 {
1503 compatible = "arm,gic-400";
1504 #interrupt-cells = <3>;
1505 #address-cells = <0>;
1506 interrupt-controller;
1507 reg = <0x0 0xf1010000 0 0x1000>,
1508 <0x0 0xf1020000 0 0x20000>,
1509 <0x0 0xf1040000 0 0x20000>,
1510 <0x0 0xf1060000 0 0x20000>;
1511 interrupts = <GIC_PPI 9
1512 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
1513 clocks = <&cpg CPG_MOD 408>;
1514 clock-names = "clk";
1515 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1516 resets = <&cpg 408>;
1517 };
1518
1519 pciec0: pcie@fe000000 {
2400 gic: interrupt-controller@f1010000 {
2401 compatible = "arm,gic-400";
2402 #interrupt-cells = <3>;
2403 #address-cells = <0>;
2404 interrupt-controller;
2405 reg = <0x0 0xf1010000 0 0x1000>,
2406 <0x0 0xf1020000 0 0x20000>,
2407 <0x0 0xf1040000 0 0x20000>,
2408 <0x0 0xf1060000 0 0x20000>;
2409 interrupts = <GIC_PPI 9
2410 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2411 clocks = <&cpg CPG_MOD 408>;
2412 clock-names = "clk";
2413 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2414 resets = <&cpg 408>;
2415 };
2416
2417 pciec0: pcie@fe000000 {
2418 compatible = "renesas,pcie-r8a774e1",
2419 "renesas,pcie-rcar-gen3";
1520 reg = <0 0xfe000000 0 0x80000>;
1521 #address-cells = <3>;
1522 #size-cells = <2>;
2420 reg = <0 0xfe000000 0 0x80000>;
2421 #address-cells = <3>;
2422 #size-cells = <2>;
2423 bus-range = <0x00 0xff>;
2424 device_type = "pci";
2425 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2426 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2427 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2428 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2429 /* Map all possible DDR as inbound ranges */
2430 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2431 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2432 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2433 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2434 #interrupt-cells = <1>;
2435 interrupt-map-mask = <0 0 0 0>;
2436 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2437 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2438 clock-names = "pcie", "pcie_bus";
2439 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2440 resets = <&cpg 319>;
1523 status = "disabled";
2441 status = "disabled";
2442 };
1524
2443
1525 /* placeholder */
2444 pciec1: pcie@ee800000 {
2445 compatible = "renesas,pcie-r8a774e1",
2446 "renesas,pcie-rcar-gen3";
2447 reg = <0 0xee800000 0 0x80000>;
2448 #address-cells = <3>;
2449 #size-cells = <2>;
2450 bus-range = <0x00 0xff>;
2451 device_type = "pci";
2452 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2453 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2454 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2455 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2456 /* Map all possible DDR as inbound ranges */
2457 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2458 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2459 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2460 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2461 #interrupt-cells = <1>;
2462 interrupt-map-mask = <0 0 0 0>;
2463 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2464 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2465 clock-names = "pcie", "pcie_bus";
2466 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2467 resets = <&cpg 318>;
2468 status = "disabled";
1526 };
1527
2469 };
2470
2471 pciec0_ep: pcie-ep@fe000000 {
2472 compatible = "renesas,r8a774e1-pcie-ep",
2473 "renesas,rcar-gen3-pcie-ep";
2474 reg = <0x0 0xfe000000 0 0x80000>,
2475 <0x0 0xfe100000 0 0x100000>,
2476 <0x0 0xfe200000 0 0x200000>,
2477 <0x0 0x30000000 0 0x8000000>,
2478 <0x0 0x38000000 0 0x8000000>;
2479 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2480 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2481 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2482 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2483 clocks = <&cpg CPG_MOD 319>;
2484 clock-names = "pcie";
2485 resets = <&cpg 319>;
2486 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2487 status = "disabled";
2488 };
2489
2490 pciec1_ep: pcie-ep@ee800000 {
2491 compatible = "renesas,r8a774e1-pcie-ep",
2492 "renesas,rcar-gen3-pcie-ep";
2493 reg = <0x0 0xee800000 0 0x80000>,
2494 <0x0 0xee900000 0 0x100000>,
2495 <0x0 0xeea00000 0 0x200000>,
2496 <0x0 0xc0000000 0 0x8000000>,
2497 <0x0 0xc8000000 0 0x8000000>;
2498 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2499 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2500 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2501 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2502 clocks = <&cpg CPG_MOD 318>;
2503 clock-names = "pcie";
2504 resets = <&cpg 318>;
2505 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2506 status = "disabled";
2507 };
2508
2509 vspbc: vsp@fe920000 {
2510 compatible = "renesas,vsp2";
2511 reg = <0 0xfe920000 0 0x8000>;
2512 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2513 clocks = <&cpg CPG_MOD 624>;
2514 power-domains = <&sysc R8A774E1_PD_A3VP>;
2515 resets = <&cpg 624>;
2516
2517 renesas,fcp = <&fcpvb1>;
2518 };
2519
2520 vspbd: vsp@fe960000 {
2521 compatible = "renesas,vsp2";
2522 reg = <0 0xfe960000 0 0x8000>;
2523 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2524 clocks = <&cpg CPG_MOD 626>;
2525 power-domains = <&sysc R8A774E1_PD_A3VP>;
2526 resets = <&cpg 626>;
2527
2528 renesas,fcp = <&fcpvb0>;
2529 };
2530
2531 vspd0: vsp@fea20000 {
2532 compatible = "renesas,vsp2";
2533 reg = <0 0xfea20000 0 0x5000>;
2534 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2535 clocks = <&cpg CPG_MOD 623>;
2536 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2537 resets = <&cpg 623>;
2538
2539 renesas,fcp = <&fcpvd0>;
2540 };
2541
2542 vspd1: vsp@fea28000 {
2543 compatible = "renesas,vsp2";
2544 reg = <0 0xfea28000 0 0x5000>;
2545 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2546 clocks = <&cpg CPG_MOD 622>;
2547 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2548 resets = <&cpg 622>;
2549
2550 renesas,fcp = <&fcpvd1>;
2551 };
2552
2553 vspi0: vsp@fe9a0000 {
2554 compatible = "renesas,vsp2";
2555 reg = <0 0xfe9a0000 0 0x8000>;
2556 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2557 clocks = <&cpg CPG_MOD 631>;
2558 power-domains = <&sysc R8A774E1_PD_A3VP>;
2559 resets = <&cpg 631>;
2560
2561 renesas,fcp = <&fcpvi0>;
2562 };
2563
2564 vspi1: vsp@fe9b0000 {
2565 compatible = "renesas,vsp2";
2566 reg = <0 0xfe9b0000 0 0x8000>;
2567 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2568 clocks = <&cpg CPG_MOD 630>;
2569 power-domains = <&sysc R8A774E1_PD_A3VP>;
2570 resets = <&cpg 630>;
2571
2572 renesas,fcp = <&fcpvi1>;
2573 };
2574
2575 fdp1@fe940000 {
2576 compatible = "renesas,fdp1";
2577 reg = <0 0xfe940000 0 0x2400>;
2578 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2579 clocks = <&cpg CPG_MOD 119>;
2580 power-domains = <&sysc R8A774E1_PD_A3VP>;
2581 resets = <&cpg 119>;
2582 renesas,fcp = <&fcpf0>;
2583 };
2584
2585 fdp1@fe944000 {
2586 compatible = "renesas,fdp1";
2587 reg = <0 0xfe944000 0 0x2400>;
2588 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2589 clocks = <&cpg CPG_MOD 118>;
2590 power-domains = <&sysc R8A774E1_PD_A3VP>;
2591 resets = <&cpg 118>;
2592 renesas,fcp = <&fcpf1>;
2593 };
2594
2595 fcpf0: fcp@fe950000 {
2596 compatible = "renesas,fcpf";
2597 reg = <0 0xfe950000 0 0x200>;
2598 clocks = <&cpg CPG_MOD 615>;
2599 power-domains = <&sysc R8A774E1_PD_A3VP>;
2600 resets = <&cpg 615>;
2601 };
2602
2603 fcpf1: fcp@fe951000 {
2604 compatible = "renesas,fcpf";
2605 reg = <0 0xfe951000 0 0x200>;
2606 clocks = <&cpg CPG_MOD 614>;
2607 power-domains = <&sysc R8A774E1_PD_A3VP>;
2608 resets = <&cpg 614>;
2609 };
2610
2611 fcpvb0: fcp@fe96f000 {
2612 compatible = "renesas,fcpv";
2613 reg = <0 0xfe96f000 0 0x200>;
2614 clocks = <&cpg CPG_MOD 607>;
2615 power-domains = <&sysc R8A774E1_PD_A3VP>;
2616 resets = <&cpg 607>;
2617 };
2618
2619 fcpvb1: fcp@fe92f000 {
2620 compatible = "renesas,fcpv";
2621 reg = <0 0xfe92f000 0 0x200>;
2622 clocks = <&cpg CPG_MOD 606>;
2623 power-domains = <&sysc R8A774E1_PD_A3VP>;
2624 resets = <&cpg 606>;
2625 };
2626
2627 fcpvi0: fcp@fe9af000 {
2628 compatible = "renesas,fcpv";
2629 reg = <0 0xfe9af000 0 0x200>;
2630 clocks = <&cpg CPG_MOD 611>;
2631 power-domains = <&sysc R8A774E1_PD_A3VP>;
2632 resets = <&cpg 611>;
2633 };
2634
2635 fcpvi1: fcp@fe9bf000 {
2636 compatible = "renesas,fcpv";
2637 reg = <0 0xfe9bf000 0 0x200>;
2638 clocks = <&cpg CPG_MOD 610>;
2639 power-domains = <&sysc R8A774E1_PD_A3VP>;
2640 resets = <&cpg 610>;
2641 };
2642
2643 fcpvd0: fcp@fea27000 {
2644 compatible = "renesas,fcpv";
2645 reg = <0 0xfea27000 0 0x200>;
2646 clocks = <&cpg CPG_MOD 603>;
2647 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2648 resets = <&cpg 603>;
2649 };
2650
2651 fcpvd1: fcp@fea2f000 {
2652 compatible = "renesas,fcpv";
2653 reg = <0 0xfea2f000 0 0x200>;
2654 clocks = <&cpg CPG_MOD 602>;
2655 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2656 resets = <&cpg 602>;
2657 };
2658
2659 csi20: csi2@fea80000 {
2660 compatible = "renesas,r8a774e1-csi2";
2661 reg = <0 0xfea80000 0 0x10000>;
2662 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2663 clocks = <&cpg CPG_MOD 714>;
2664 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2665 resets = <&cpg 714>;
2666 status = "disabled";
2667
2668 ports {
2669 #address-cells = <1>;
2670 #size-cells = <0>;
2671
2672 port@1 {
2673 #address-cells = <1>;
2674 #size-cells = <0>;
2675
2676 reg = <1>;
2677
2678 csi20vin0: endpoint@0 {
2679 reg = <0>;
2680 remote-endpoint = <&vin0csi20>;
2681 };
2682 csi20vin1: endpoint@1 {
2683 reg = <1>;
2684 remote-endpoint = <&vin1csi20>;
2685 };
2686 csi20vin2: endpoint@2 {
2687 reg = <2>;
2688 remote-endpoint = <&vin2csi20>;
2689 };
2690 csi20vin3: endpoint@3 {
2691 reg = <3>;
2692 remote-endpoint = <&vin3csi20>;
2693 };
2694 csi20vin4: endpoint@4 {
2695 reg = <4>;
2696 remote-endpoint = <&vin4csi20>;
2697 };
2698 csi20vin5: endpoint@5 {
2699 reg = <5>;
2700 remote-endpoint = <&vin5csi20>;
2701 };
2702 csi20vin6: endpoint@6 {
2703 reg = <6>;
2704 remote-endpoint = <&vin6csi20>;
2705 };
2706 csi20vin7: endpoint@7 {
2707 reg = <7>;
2708 remote-endpoint = <&vin7csi20>;
2709 };
2710 };
2711 };
2712 };
2713
2714 csi40: csi2@feaa0000 {
2715 compatible = "renesas,r8a774e1-csi2";
2716 reg = <0 0xfeaa0000 0 0x10000>;
2717 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2718 clocks = <&cpg CPG_MOD 716>;
2719 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2720 resets = <&cpg 716>;
2721 status = "disabled";
2722
2723 ports {
2724 #address-cells = <1>;
2725 #size-cells = <0>;
2726
2727 port@1 {
2728 #address-cells = <1>;
2729 #size-cells = <0>;
2730
2731 reg = <1>;
2732
2733 csi40vin0: endpoint@0 {
2734 reg = <0>;
2735 remote-endpoint = <&vin0csi40>;
2736 };
2737 csi40vin1: endpoint@1 {
2738 reg = <1>;
2739 remote-endpoint = <&vin1csi40>;
2740 };
2741 csi40vin2: endpoint@2 {
2742 reg = <2>;
2743 remote-endpoint = <&vin2csi40>;
2744 };
2745 csi40vin3: endpoint@3 {
2746 reg = <3>;
2747 remote-endpoint = <&vin3csi40>;
2748 };
2749 };
2750 };
2751 };
2752
1528 hdmi0: hdmi@fead0000 {
2753 hdmi0: hdmi@fead0000 {
2754 compatible = "renesas,r8a774e1-hdmi",
2755 "renesas,rcar-gen3-hdmi";
1529 reg = <0 0xfead0000 0 0x10000>;
2756 reg = <0 0xfead0000 0 0x10000>;
2757 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2758 clocks = <&cpg CPG_MOD 729>,
2759 <&cpg CPG_CORE R8A774E1_CLK_HDMI>;
2760 clock-names = "iahb", "isfr";
2761 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2762 resets = <&cpg 729>;
1530 status = "disabled";
1531
2763 status = "disabled";
2764
1532 /* placeholder */
1533
1534 ports {
1535 #address-cells = <1>;
1536 #size-cells = <0>;
1537
1538 port@0 {
1539 reg = <0>;
2765 ports {
2766 #address-cells = <1>;
2767 #size-cells = <0>;
2768
2769 port@0 {
2770 reg = <0>;
2771 dw_hdmi0_in: endpoint {
2772 remote-endpoint = <&du_out_hdmi0>;
2773 };
1540 };
1541 port@1 {
1542 reg = <1>;
1543 };
1544 port@2 {
2774 };
2775 port@1 {
2776 reg = <1>;
2777 };
2778 port@2 {
2779 /* HDMI sound */
1545 reg = <2>;
1546 };
1547 };
1548 };
1549
1550 du: display@feb00000 {
2780 reg = <2>;
2781 };
2782 };
2783 };
2784
2785 du: display@feb00000 {
2786 compatible = "renesas,du-r8a774e1";
1551 reg = <0 0xfeb00000 0 0x80000>;
2787 reg = <0 0xfeb00000 0 0x80000>;
2788 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2789 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2790 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2791 clocks = <&cpg CPG_MOD 724>,
2792 <&cpg CPG_MOD 723>,
2793 <&cpg CPG_MOD 721>;
2794 clock-names = "du.0", "du.1", "du.3";
2795 resets = <&cpg 724>, <&cpg 722>;
2796 reset-names = "du.0", "du.3";
1552 status = "disabled";
1553
2797 status = "disabled";
2798
1554 /* placeholder */
2799 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2800
1555 ports {
1556 #address-cells = <1>;
1557 #size-cells = <0>;
1558
1559 port@0 {
1560 reg = <0>;
2801 ports {
2802 #address-cells = <1>;
2803 #size-cells = <0>;
2804
2805 port@0 {
2806 reg = <0>;
2807 du_out_rgb: endpoint {
2808 };
1561 };
1562 port@1 {
1563 reg = <1>;
2809 };
2810 port@1 {
2811 reg = <1>;
2812 du_out_hdmi0: endpoint {
2813 remote-endpoint = <&dw_hdmi0_in>;
2814 };
1564 };
1565 port@2 {
1566 reg = <2>;
2815 };
2816 port@2 {
2817 reg = <2>;
2818 du_out_lvds0: endpoint {
2819 remote-endpoint = <&lvds0_in>;
2820 };
1567 };
1568 };
1569 };
1570
2821 };
2822 };
2823 };
2824
2825 lvds0: lvds@feb90000 {
2826 compatible = "renesas,r8a774e1-lvds";
2827 reg = <0 0xfeb90000 0 0x14>;
2828 clocks = <&cpg CPG_MOD 727>;
2829 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2830 resets = <&cpg 727>;
2831 status = "disabled";
2832
2833 ports {
2834 #address-cells = <1>;
2835 #size-cells = <0>;
2836
2837 port@0 {
2838 reg = <0>;
2839 lvds0_in: endpoint {
2840 remote-endpoint = <&du_out_lvds0>;
2841 };
2842 };
2843 port@1 {
2844 reg = <1>;
2845 lvds0_out: endpoint {
2846 };
2847 };
2848 };
2849 };
2850
1571 prr: chipid@fff00044 {
1572 compatible = "renesas,prr";
1573 reg = <0 0xfff00044 0 4>;
1574 };
1575 };
1576
1577 thermal-zones {
1578 sensor_thermal1: sensor-thermal1 {

--- 86 unchanged lines hidden --- 		2851 prr: chipid@fff00044 {
2852 compatible = "renesas,prr";
2853 reg = <0 0xfff00044 0 4>;
2854 };
2855 };
2856
2857 thermal-zones {
2858 sensor_thermal1: sensor-thermal1 {

--- 86 unchanged lines hidden ---