r8a774e1.dtsi (8be98d2f2a0a262f8bf8a0bc1fdf522b3c7aab17) r8a774e1.dtsi (52e844ee9a6f460e6160736a43ef13317a91ca74)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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1225 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1226 "ch4", "ch5", "ch6", "ch7",
1227 "ch8", "ch9", "ch10", "ch11",
1228 "ch12", "ch13", "ch14", "ch15",
1229 "ch16", "ch17", "ch18", "ch19",
1230 "ch20", "ch21", "ch22", "ch23",
1231 "ch24";
1232 clocks = <&cpg CPG_MOD 812>;
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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1225 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1226 "ch4", "ch5", "ch6", "ch7",
1227 "ch8", "ch9", "ch10", "ch11",
1228 "ch12", "ch13", "ch14", "ch15",
1229 "ch16", "ch17", "ch18", "ch19",
1230 "ch20", "ch21", "ch22", "ch23",
1231 "ch24";
1232 clocks = <&cpg CPG_MOD 812>;
1233 clock-names = "fck";
1233 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1234 resets = <&cpg 812>;
1235 phy-mode = "rgmii";
1236 rx-internal-delay-ps = <0>;
1237 tx-internal-delay-ps = <0>;
1238 iommus = <&ipmmu_ds0 16>;
1239 #address-cells = <1>;
1240 #size-cells = <0>;

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2356 status = "disabled";
2357 };
2358
2359 sdhi0: mmc@ee100000 {
2360 compatible = "renesas,sdhi-r8a774e1",
2361 "renesas,rcar-gen3-sdhi";
2362 reg = <0 0xee100000 0 0x2000>;
2363 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1234 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1235 resets = <&cpg 812>;
1236 phy-mode = "rgmii";
1237 rx-internal-delay-ps = <0>;
1238 tx-internal-delay-ps = <0>;
1239 iommus = <&ipmmu_ds0 16>;
1240 #address-cells = <1>;
1241 #size-cells = <0>;

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2357 status = "disabled";
2358 };
2359
2360 sdhi0: mmc@ee100000 {
2361 compatible = "renesas,sdhi-r8a774e1",
2362 "renesas,rcar-gen3-sdhi";
2363 reg = <0 0xee100000 0 0x2000>;
2364 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2364 clocks = <&cpg CPG_MOD 314>;
2365 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774E1_CLK_SD0H>;
2366 clock-names = "core", "clkh";
2365 max-frequency = <200000000>;
2366 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2367 resets = <&cpg 314>;
2368 iommus = <&ipmmu_ds1 32>;
2369 status = "disabled";
2370 };
2371
2372 sdhi1: mmc@ee120000 {
2373 compatible = "renesas,sdhi-r8a774e1",
2374 "renesas,rcar-gen3-sdhi";
2375 reg = <0 0xee120000 0 0x2000>;
2376 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2367 max-frequency = <200000000>;
2368 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2369 resets = <&cpg 314>;
2370 iommus = <&ipmmu_ds1 32>;
2371 status = "disabled";
2372 };
2373
2374 sdhi1: mmc@ee120000 {
2375 compatible = "renesas,sdhi-r8a774e1",
2376 "renesas,rcar-gen3-sdhi";
2377 reg = <0 0xee120000 0 0x2000>;
2378 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2377 clocks = <&cpg CPG_MOD 313>;
2379 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774E1_CLK_SD1H>;
2380 clock-names = "core", "clkh";
2378 max-frequency = <200000000>;
2379 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2380 resets = <&cpg 313>;
2381 iommus = <&ipmmu_ds1 33>;
2382 status = "disabled";
2383 };
2384
2385 sdhi2: mmc@ee140000 {
2386 compatible = "renesas,sdhi-r8a774e1",
2387 "renesas,rcar-gen3-sdhi";
2388 reg = <0 0xee140000 0 0x2000>;
2389 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2381 max-frequency = <200000000>;
2382 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2383 resets = <&cpg 313>;
2384 iommus = <&ipmmu_ds1 33>;
2385 status = "disabled";
2386 };
2387
2388 sdhi2: mmc@ee140000 {
2389 compatible = "renesas,sdhi-r8a774e1",
2390 "renesas,rcar-gen3-sdhi";
2391 reg = <0 0xee140000 0 0x2000>;
2392 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2390 clocks = <&cpg CPG_MOD 312>;
2393 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774E1_CLK_SD2H>;
2394 clock-names = "core", "clkh";
2391 max-frequency = <200000000>;
2392 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2393 resets = <&cpg 312>;
2394 iommus = <&ipmmu_ds1 34>;
2395 status = "disabled";
2396 };
2397
2398 sdhi3: mmc@ee160000 {
2399 compatible = "renesas,sdhi-r8a774e1",
2400 "renesas,rcar-gen3-sdhi";
2401 reg = <0 0xee160000 0 0x2000>;
2402 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2395 max-frequency = <200000000>;
2396 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2397 resets = <&cpg 312>;
2398 iommus = <&ipmmu_ds1 34>;
2399 status = "disabled";
2400 };
2401
2402 sdhi3: mmc@ee160000 {
2403 compatible = "renesas,sdhi-r8a774e1",
2404 "renesas,rcar-gen3-sdhi";
2405 reg = <0 0xee160000 0 0x2000>;
2406 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2403 clocks = <&cpg CPG_MOD 311>;
2407 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774E1_CLK_SD3H>;
2408 clock-names = "core", "clkh";
2404 max-frequency = <200000000>;
2405 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2406 resets = <&cpg 311>;
2407 iommus = <&ipmmu_ds1 35>;
2408 status = "disabled";
2409 };
2410
2411 rpc: spi@ee200000 {

--- 581 unchanged lines hidden --- 		2409 max-frequency = <200000000>;
2410 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2411 resets = <&cpg 311>;
2412 iommus = <&ipmmu_ds1 35>;
2413 status = "disabled";
2414 };
2415
2416 rpc: spi@ee200000 {

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