r8a774e1.dtsi (666fab4a3ea143315a9c059fad9f3a0f1365d54b) r8a774e1.dtsi (7de8bfaa095fcbc2db2952d4b561be102a41c2a6)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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23 * Boards that provide audio clocks should override them.
24 */
25 audio_clk_a: audio_clk_a {
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
29 };
30
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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23 * Boards that provide audio clocks should override them.
24 */
25 audio_clk_a: audio_clk_a {
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
29 };
30
31 audio_clk_b: audio_clk_b {
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <0>;
35 };
36
31 audio_clk_c: audio_clk_c {
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <0>;
35 };
36
37 /* External CAN clock - to be overridden by boards that provide it */
38 can_clk: can {

--- 2906 unchanged lines hidden --- 		37 audio_clk_c: audio_clk_c {
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
40 clock-frequency = <0>;
41 };
42
43 /* External CAN clock - to be overridden by boards that provide it */
44 can_clk: can {

--- 2906 unchanged lines hidden ---