r8a774e1.dtsi (05c79a8f0c843dfaae09cfde338c5e570f3d9b6b) r8a774e1.dtsi (96ebdb7a87917fd6ee74f46024ca756cc3d3d1ce)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

--- 276 unchanged lines hidden (view full) ---

285 soc {
286 compatible = "simple-bus";
287 interrupt-parent = <&gic>;
288 #address-cells = <2>;
289 #size-cells = <2>;
290 ranges;
291
292 rwdt: watchdog@e6020000 {
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

--- 276 unchanged lines hidden (view full) ---

285 soc {
286 compatible = "simple-bus";
287 interrupt-parent = <&gic>;
288 #address-cells = <2>;
289 #size-cells = <2>;
290 ranges;
291
292 rwdt: watchdog@e6020000 {
293 compatible = "renesas,r8a774e1-wdt",
294 "renesas,rcar-gen3-wdt";
293 reg = <0 0xe6020000 0 0x0c>;
295 reg = <0 0xe6020000 0 0x0c>;
296 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
297 clocks = <&cpg CPG_MOD 402>;
298 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
299 resets = <&cpg 402>;
294 status = "disabled";
300 status = "disabled";
295
296 /* placeholder */
297 };
298
299 gpio0: gpio@e6050000 {
300 compatible = "renesas,gpio-r8a774e1",
301 "renesas,rcar-gen3-gpio";
302 reg = <0 0xe6050000 0 0x50>;
303 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
304 #gpio-cells = <2>;

--- 1306 unchanged lines hidden ---
301 };
302
303 gpio0: gpio@e6050000 {
304 compatible = "renesas,gpio-r8a774e1",
305 "renesas,rcar-gen3-gpio";
306 reg = <0 0xe6050000 0 0x50>;
307 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
308 #gpio-cells = <2>;

--- 1306 unchanged lines hidden ---