r8a774b1.dtsi (9ddb236f13594b34a12dacf69a5adca7a1aef35e) r8a774b1.dtsi (a2053990f3275e715d69c208d8c0040cac0df593)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774b1 SoC
4 *
5 * Copyright (C) 2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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277 gpio-ranges = <&pfc 0 224 4>;
278 #interrupt-cells = <2>;
279 interrupt-controller;
280 clocks = <&cpg CPG_MOD 905>;
281 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
282 resets = <&cpg 905>;
283 };
284
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774b1 SoC
4 *
5 * Copyright (C) 2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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277 gpio-ranges = <&pfc 0 224 4>;
278 #interrupt-cells = <2>;
279 interrupt-controller;
280 clocks = <&cpg CPG_MOD 905>;
281 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
282 resets = <&cpg 905>;
283 };
284
285 pfc: pin-controller@e6060000 {
285 pfc: pinctrl@e6060000 {
286 compatible = "renesas,pfc-r8a774b1";
287 reg = <0 0xe6060000 0 0x50c>;
288 };
289
290 cmt0: timer@e60f0000 {
291 compatible = "renesas,r8a774b1-cmt0",
292 "renesas,rcar-gen3-cmt0";
293 reg = <0 0xe60f0000 0 0x1004>;

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2235 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2236 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2237 clock-names = "pcie", "pcie_bus";
2238 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2239 resets = <&cpg 318>;
2240 status = "disabled";
2241 };
2242
286 compatible = "renesas,pfc-r8a774b1";
287 reg = <0 0xe6060000 0 0x50c>;
288 };
289
290 cmt0: timer@e60f0000 {
291 compatible = "renesas,r8a774b1-cmt0",
292 "renesas,rcar-gen3-cmt0";
293 reg = <0 0xe60f0000 0 0x1004>;

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2235 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2236 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2237 clock-names = "pcie", "pcie_bus";
2238 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2239 resets = <&cpg 318>;
2240 status = "disabled";
2241 };
2242
2243 pciec0_ep: pcie-ep@fe000000 {
2244 compatible = "renesas,r8a774b1-pcie-ep",
2245 "renesas,rcar-gen3-pcie-ep";
2246 reg = <0x0 0xfe000000 0 0x80000>,
2247 <0x0 0xfe100000 0 0x100000>,
2248 <0x0 0xfe200000 0 0x200000>,
2249 <0x0 0x30000000 0 0x8000000>,
2250 <0x0 0x38000000 0 0x8000000>;
2251 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2252 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2253 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2254 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2255 clocks = <&cpg CPG_MOD 319>;
2256 clock-names = "pcie";
2257 resets = <&cpg 319>;
2258 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2259 status = "disabled";
2260 };
2261
2262 pciec1_ep: pcie-ep@ee800000 {
2263 compatible = "renesas,r8a774b1-pcie-ep",
2264 "renesas,rcar-gen3-pcie-ep";
2265 reg = <0x0 0xee800000 0 0x80000>,
2266 <0x0 0xee900000 0 0x100000>,
2267 <0x0 0xeea00000 0 0x200000>,
2268 <0x0 0xc0000000 0 0x8000000>,
2269 <0x0 0xc8000000 0 0x8000000>;
2270 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2271 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2272 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2273 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2274 clocks = <&cpg CPG_MOD 318>;
2275 clock-names = "pcie";
2276 resets = <&cpg 318>;
2277 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2278 status = "disabled";
2279 };
2280
2243 fdp1@fe940000 {
2244 compatible = "renesas,fdp1";
2245 reg = <0 0xfe940000 0 0x2400>;
2246 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2247 clocks = <&cpg CPG_MOD 119>;
2248 power-domains = <&sysc R8A774B1_PD_A3VP>;
2249 resets = <&cpg 119>;
2250 renesas,fcp = <&fcpf0>;

--- 380 unchanged lines hidden --- 		2281 fdp1@fe940000 {
2282 compatible = "renesas,fdp1";
2283 reg = <0 0xfe940000 0 0x2400>;
2284 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2285 clocks = <&cpg CPG_MOD 119>;
2286 power-domains = <&sysc R8A774B1_PD_A3VP>;
2287 resets = <&cpg 119>;
2288 renesas,fcp = <&fcpf0>;

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