r8a774b1.dtsi (0f69403d2535ffc7200a8414cf3ca66a49b0d741) r8a774b1.dtsi (d728a4476a118ff4d075459fd4594f7c46e27fc0)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774b1 SoC
4 *
5 * Copyright (C) 2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
11#include <dt-bindings/power/r8a774b1-sysc.h>
12
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774b1 SoC
4 *
5 * Copyright (C) 2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
11#include <dt-bindings/power/r8a774b1-sysc.h>
12
13#define CPG_AUDIO_CLK_I R8A774B1_CLK_S0D4
14
13/ {
14 compatible = "renesas,r8a774b1";
15 #address-cells = <2>;
16 #size-cells = <2>;
17
18 /*
19 * The external audio clocks are configured as 0 Hz fixed frequency
20 * clocks by default.

--- 2608 unchanged lines hidden --- 		15/ {
16 compatible = "renesas,r8a774b1";
17 #address-cells = <2>;
18 #size-cells = <2>;
19
20 /*
21 * The external audio clocks are configured as 0 Hz fixed frequency
22 * clocks by default.

--- 2608 unchanged lines hidden ---