r8a774b1.dtsi (0aab5b914b41601ee7e4ba9bd81344665db1fbca) r8a774b1.dtsi (9504a9f27a8c2c3a78f566c5cde75b53657b386a)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774b1 SoC
4 *
5 * Copyright (C) 2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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2187 pciec0: pcie@fe000000 {
2188 compatible = "renesas,pcie-r8a774b1",
2189 "renesas,pcie-rcar-gen3";
2190 reg = <0 0xfe000000 0 0x80000>;
2191 #address-cells = <3>;
2192 #size-cells = <2>;
2193 bus-range = <0x00 0xff>;
2194 device_type = "pci";
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774b1 SoC
4 *
5 * Copyright (C) 2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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2187 pciec0: pcie@fe000000 {
2188 compatible = "renesas,pcie-r8a774b1",
2189 "renesas,pcie-rcar-gen3";
2190 reg = <0 0xfe000000 0 0x80000>;
2191 #address-cells = <3>;
2192 #size-cells = <2>;
2193 bus-range = <0x00 0xff>;
2194 device_type = "pci";
2195 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2196 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2197 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2198 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2195 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2196 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2197 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2198 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2199 /* Map all possible DDR as inbound ranges */
2200 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2201 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2202 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2203 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2204 #interrupt-cells = <1>;
2205 interrupt-map-mask = <0 0 0 0>;
2206 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;

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2214 pciec1: pcie@ee800000 {
2215 compatible = "renesas,pcie-r8a774b1",
2216 "renesas,pcie-rcar-gen3";
2217 reg = <0 0xee800000 0 0x80000>;
2218 #address-cells = <3>;
2219 #size-cells = <2>;
2220 bus-range = <0x00 0xff>;
2221 device_type = "pci";
2199 /* Map all possible DDR as inbound ranges */
2200 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2201 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2202 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2203 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2204 #interrupt-cells = <1>;
2205 interrupt-map-mask = <0 0 0 0>;
2206 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;

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2214 pciec1: pcie@ee800000 {
2215 compatible = "renesas,pcie-r8a774b1",
2216 "renesas,pcie-rcar-gen3";
2217 reg = <0 0xee800000 0 0x80000>;
2218 #address-cells = <3>;
2219 #size-cells = <2>;
2220 bus-range = <0x00 0xff>;
2221 device_type = "pci";
2222 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2223 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2224 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2225 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2222 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2223 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2224 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2225 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2226 /* Map all possible DDR as inbound ranges */
2227 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2228 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2229 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2230 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2231 #interrupt-cells = <1>;
2232 interrupt-map-mask = <0 0 0 0>;
2233 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;

--- 394 unchanged lines hidden --- 		2226 /* Map all possible DDR as inbound ranges */
2227 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2228 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2229 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2230 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2231 #interrupt-cells = <1>;
2232 interrupt-map-mask = <0 0 0 0>;
2233 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;

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