r8a774a1.dtsi (e14e5c11119c5b7a587eb92cc11b8e1b1358bc15) r8a774a1.dtsi (fadbdd069376833015f56dac27f9ed3b5d5caeb4)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774a1 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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1721 <&cpg 1012>, <&cpg 1013>,
1722 <&cpg 1014>, <&cpg 1015>;
1723 reset-names = "ssi-all",
1724 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1725 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1726 "ssi.1", "ssi.0";
1727 status = "disabled";
1728
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774a1 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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1721 <&cpg 1012>, <&cpg 1013>,
1722 <&cpg 1014>, <&cpg 1015>;
1723 reset-names = "ssi-all",
1724 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1725 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1726 "ssi.1", "ssi.0";
1727 status = "disabled";
1728
1729 ports {
1730 #address-cells = <1>;
1731 #size-cells = <0>;
1732 port@0 {
1733 reg = <0>;
1734 };
1735 port@1 {
1736 reg = <1>;
1737 };
1738 };
1739
1740 rcar_sound,ctu {
1741 ctu00: ctu-0 { };
1742 ctu01: ctu-1 { };
1743 ctu02: ctu-2 { };
1744 ctu03: ctu-3 { };
1745 ctu10: ctu-4 { };
1746 ctu11: ctu-5 { };
1747 ctu12: ctu-6 { };
1748 ctu13: ctu-7 { };
1749 };
1750
1729 rcar_sound,dvc {
1730 dvc0: dvc-0 {
1731 dmas = <&audma1 0xbc>;
1732 dma-names = "tx";
1733 };
1734 dvc1: dvc-1 {
1735 dmas = <&audma1 0xbe>;
1736 dma-names = "tx";
1737 };
1738 };
1739
1740 rcar_sound,mix {
1741 mix0: mix-0 { };
1742 mix1: mix-1 { };
1743 };
1744
1751 rcar_sound,dvc {
1752 dvc0: dvc-0 {
1753 dmas = <&audma1 0xbc>;
1754 dma-names = "tx";
1755 };
1756 dvc1: dvc-1 {
1757 dmas = <&audma1 0xbe>;
1758 dma-names = "tx";
1759 };
1760 };
1761
1762 rcar_sound,mix {
1763 mix0: mix-0 { };
1764 mix1: mix-1 { };
1765 };
1766
1745 rcar_sound,ctu {
1746 ctu00: ctu-0 { };
1747 ctu01: ctu-1 { };
1748 ctu02: ctu-2 { };
1749 ctu03: ctu-3 { };
1750 ctu10: ctu-4 { };
1751 ctu11: ctu-5 { };
1752 ctu12: ctu-6 { };
1753 ctu13: ctu-7 { };
1754 };
1755
1756 rcar_sound,src {
1757 src0: src-0 {
1758 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1759 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1760 dma-names = "rx", "tx";
1761 };
1762 src1: src-1 {
1763 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;

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1801 };
1802 src9: src-9 {
1803 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1804 dmas = <&audma0 0x97>, <&audma1 0xba>;
1805 dma-names = "rx", "tx";
1806 };
1807 };
1808
1767 rcar_sound,src {
1768 src0: src-0 {
1769 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1770 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1771 dma-names = "rx", "tx";
1772 };
1773 src1: src-1 {
1774 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;

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1812 };
1813 src9: src-9 {
1814 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1815 dmas = <&audma0 0x97>, <&audma1 0xba>;
1816 dma-names = "rx", "tx";
1817 };
1818 };
1819
1820 rcar_sound,ssi {
1821 ssi0: ssi-0 {
1822 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1823 dmas = <&audma0 0x01>, <&audma1 0x02>;
1824 dma-names = "rx", "tx";
1825 };
1826 ssi1: ssi-1 {
1827 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1828 dmas = <&audma0 0x03>, <&audma1 0x04>;
1829 dma-names = "rx", "tx";
1830 };
1831 ssi2: ssi-2 {
1832 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1833 dmas = <&audma0 0x05>, <&audma1 0x06>;
1834 dma-names = "rx", "tx";
1835 };
1836 ssi3: ssi-3 {
1837 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1838 dmas = <&audma0 0x07>, <&audma1 0x08>;
1839 dma-names = "rx", "tx";
1840 };
1841 ssi4: ssi-4 {
1842 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1843 dmas = <&audma0 0x09>, <&audma1 0x0a>;
1844 dma-names = "rx", "tx";
1845 };
1846 ssi5: ssi-5 {
1847 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1848 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1849 dma-names = "rx", "tx";
1850 };
1851 ssi6: ssi-6 {
1852 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1853 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1854 dma-names = "rx", "tx";
1855 };
1856 ssi7: ssi-7 {
1857 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1858 dmas = <&audma0 0x0f>, <&audma1 0x10>;
1859 dma-names = "rx", "tx";
1860 };
1861 ssi8: ssi-8 {
1862 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1863 dmas = <&audma0 0x11>, <&audma1 0x12>;
1864 dma-names = "rx", "tx";
1865 };
1866 ssi9: ssi-9 {
1867 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1868 dmas = <&audma0 0x13>, <&audma1 0x14>;
1869 dma-names = "rx", "tx";
1870 };
1871 };
1872
1809 rcar_sound,ssiu {
1810 ssiu00: ssiu-0 {
1811 dmas = <&audma0 0x15>, <&audma1 0x16>;
1812 dma-names = "rx", "tx";
1813 };
1814 ssiu01: ssiu-1 {
1815 dmas = <&audma0 0x35>, <&audma1 0x36>;
1816 dma-names = "rx", "tx";

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2011 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2012 dma-names = "rx", "tx";
2013 };
2014 ssiu97: ssiu-51 {
2015 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2016 dma-names = "rx", "tx";
2017 };
2018 };
1873 rcar_sound,ssiu {
1874 ssiu00: ssiu-0 {
1875 dmas = <&audma0 0x15>, <&audma1 0x16>;
1876 dma-names = "rx", "tx";
1877 };
1878 ssiu01: ssiu-1 {
1879 dmas = <&audma0 0x35>, <&audma1 0x36>;
1880 dma-names = "rx", "tx";

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2075 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2076 dma-names = "rx", "tx";
2077 };
2078 ssiu97: ssiu-51 {
2079 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2080 dma-names = "rx", "tx";
2081 };
2082 };
2019
2020 rcar_sound,ssi {
2021 ssi0: ssi-0 {
2022 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2023 dmas = <&audma0 0x01>, <&audma1 0x02>;
2024 dma-names = "rx", "tx";
2025 };
2026 ssi1: ssi-1 {
2027 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2028 dmas = <&audma0 0x03>, <&audma1 0x04>;
2029 dma-names = "rx", "tx";
2030 };
2031 ssi2: ssi-2 {
2032 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2033 dmas = <&audma0 0x05>, <&audma1 0x06>;
2034 dma-names = "rx", "tx";
2035 };
2036 ssi3: ssi-3 {
2037 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2038 dmas = <&audma0 0x07>, <&audma1 0x08>;
2039 dma-names = "rx", "tx";
2040 };
2041 ssi4: ssi-4 {
2042 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2043 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2044 dma-names = "rx", "tx";
2045 };
2046 ssi5: ssi-5 {
2047 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2048 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2049 dma-names = "rx", "tx";
2050 };
2051 ssi6: ssi-6 {
2052 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2053 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2054 dma-names = "rx", "tx";
2055 };
2056 ssi7: ssi-7 {
2057 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2058 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2059 dma-names = "rx", "tx";
2060 };
2061 ssi8: ssi-8 {
2062 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2063 dmas = <&audma0 0x11>, <&audma1 0x12>;
2064 dma-names = "rx", "tx";
2065 };
2066 ssi9: ssi-9 {
2067 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2068 dmas = <&audma0 0x13>, <&audma1 0x14>;
2069 dma-names = "rx", "tx";
2070 };
2071 };
2072
2073 ports {
2074 #address-cells = <1>;
2075 #size-cells = <0>;
2076 port@0 {
2077 reg = <0>;
2078 };
2079 port@1 {
2080 reg = <1>;
2081 };
2082 };
2083 };
2084
2085 audma0: dma-controller@ec700000 {
2086 compatible = "renesas,dmac-r8a774a1",
2087 "renesas,rcar-dmac";
2088 reg = <0 0xec700000 0 0x10000>;
2089 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
2090 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH

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2741 };
2742
2743 sensor_thermal3: sensor-thermal3 {
2744 polling-delay-passive = <250>;
2745 polling-delay = <1000>;
2746 thermal-sensors = <&tsc 2>;
2747 sustainable-power = <3874>;
2748
2083 };
2084
2085 audma0: dma-controller@ec700000 {
2086 compatible = "renesas,dmac-r8a774a1",
2087 "renesas,rcar-dmac";
2088 reg = <0 0xec700000 0 0x10000>;
2089 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
2090 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH

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2741 };
2742
2743 sensor_thermal3: sensor-thermal3 {
2744 polling-delay-passive = <250>;
2745 polling-delay = <1000>;
2746 thermal-sensors = <&tsc 2>;
2747 sustainable-power = <3874>;
2748
2749 cooling-maps {
2750 map0 {
2751 trip = <&target>;
2752 cooling-device = <&a57_0 0 2>;
2753 contribution = <1024>;
2754 };
2755 map1 {
2756 trip = <&target>;
2757 cooling-device = <&a53_0 0 2>;
2758 contribution = <1024>;
2759 };
2760 };
2749 trips {
2750 target: trip-point1 {
2751 temperature = <100000>;
2752 hysteresis = <1000>;
2753 type = "passive";
2754 };
2755
2756 sensor3_crit: sensor3-crit {
2757 temperature = <120000>;
2758 hysteresis = <1000>;
2759 type = "critical";
2760 };
2761 };
2761 trips {
2762 target: trip-point1 {
2763 temperature = <100000>;
2764 hysteresis = <1000>;
2765 type = "passive";
2766 };
2767
2768 sensor3_crit: sensor3-crit {
2769 temperature = <120000>;
2770 hysteresis = <1000>;
2771 type = "critical";
2772 };
2773 };
2762 cooling-maps {
2763 map0 {
2764 trip = <&target>;
2765 cooling-device = <&a57_0 0 2>;
2766 contribution = <1024>;
2767 };
2768 map1 {
2769 trip = <&target>;
2770 cooling-device = <&a53_0 0 2>;
2771 contribution = <1024>;
2772 };
2773 };
2774 };
2775 };
2776
2777 timer {
2778 compatible = "arm,armv8-timer";
2779 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2780 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2781 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,

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2775 };
2776
2777 timer {
2778 compatible = "arm,armv8-timer";
2779 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2780 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2781 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,

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