r8a774a1.dtsi (da245a5066aa4c96c153a4ede3dab68d6b2306e8) | r8a774a1.dtsi (a44efeaa0bbf699f7ad397f5130e2834d52f621e) |
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1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a774a1 SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> --- 1792 unchanged lines hidden (view full) --- 1801 }; 1802 src9: src-9 { 1803 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1804 dmas = <&audma0 0x97>, <&audma1 0xba>; 1805 dma-names = "rx", "tx"; 1806 }; 1807 }; 1808 | 1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a774a1 SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> --- 1792 unchanged lines hidden (view full) --- 1801 }; 1802 src9: src-9 { 1803 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1804 dmas = <&audma0 0x97>, <&audma1 0xba>; 1805 dma-names = "rx", "tx"; 1806 }; 1807 }; 1808 |
1809 rcar_sound,ssiu { 1810 ssiu00: ssiu-0 { 1811 dmas = <&audma0 0x15>, <&audma1 0x16>; 1812 dma-names = "rx", "tx"; 1813 }; 1814 ssiu01: ssiu-1 { 1815 dmas = <&audma0 0x35>, <&audma1 0x36>; 1816 dma-names = "rx", "tx"; 1817 }; 1818 ssiu02: ssiu-2 { 1819 dmas = <&audma0 0x37>, <&audma1 0x38>; 1820 dma-names = "rx", "tx"; 1821 }; 1822 ssiu03: ssiu-3 { 1823 dmas = <&audma0 0x47>, <&audma1 0x48>; 1824 dma-names = "rx", "tx"; 1825 }; 1826 ssiu04: ssiu-4 { 1827 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1828 dma-names = "rx", "tx"; 1829 }; 1830 ssiu05: ssiu-5 { 1831 dmas = <&audma0 0x43>, <&audma1 0x44>; 1832 dma-names = "rx", "tx"; 1833 }; 1834 ssiu06: ssiu-6 { 1835 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1836 dma-names = "rx", "tx"; 1837 }; 1838 ssiu07: ssiu-7 { 1839 dmas = <&audma0 0x53>, <&audma1 0x54>; 1840 dma-names = "rx", "tx"; 1841 }; 1842 ssiu10: ssiu-8 { 1843 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1844 dma-names = "rx", "tx"; 1845 }; 1846 ssiu11: ssiu-9 { 1847 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1848 dma-names = "rx", "tx"; 1849 }; 1850 ssiu12: ssiu-10 { 1851 dmas = <&audma0 0x57>, <&audma1 0x58>; 1852 dma-names = "rx", "tx"; 1853 }; 1854 ssiu13: ssiu-11 { 1855 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1856 dma-names = "rx", "tx"; 1857 }; 1858 ssiu14: ssiu-12 { 1859 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1860 dma-names = "rx", "tx"; 1861 }; 1862 ssiu15: ssiu-13 { 1863 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1864 dma-names = "rx", "tx"; 1865 }; 1866 ssiu16: ssiu-14 { 1867 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1868 dma-names = "rx", "tx"; 1869 }; 1870 ssiu17: ssiu-15 { 1871 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1872 dma-names = "rx", "tx"; 1873 }; 1874 ssiu20: ssiu-16 { 1875 dmas = <&audma0 0x63>, <&audma1 0x64>; 1876 dma-names = "rx", "tx"; 1877 }; 1878 ssiu21: ssiu-17 { 1879 dmas = <&audma0 0x67>, <&audma1 0x68>; 1880 dma-names = "rx", "tx"; 1881 }; 1882 ssiu22: ssiu-18 { 1883 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1884 dma-names = "rx", "tx"; 1885 }; 1886 ssiu23: ssiu-19 { 1887 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1888 dma-names = "rx", "tx"; 1889 }; 1890 ssiu24: ssiu-20 { 1891 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1892 dma-names = "rx", "tx"; 1893 }; 1894 ssiu25: ssiu-21 { 1895 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1896 dma-names = "rx", "tx"; 1897 }; 1898 ssiu26: ssiu-22 { 1899 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1900 dma-names = "rx", "tx"; 1901 }; 1902 ssiu27: ssiu-23 { 1903 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1904 dma-names = "rx", "tx"; 1905 }; 1906 ssiu30: ssiu-24 { 1907 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1908 dma-names = "rx", "tx"; 1909 }; 1910 ssiu31: ssiu-25 { 1911 dmas = <&audma0 0x21>, <&audma1 0x22>; 1912 dma-names = "rx", "tx"; 1913 }; 1914 ssiu32: ssiu-26 { 1915 dmas = <&audma0 0x23>, <&audma1 0x24>; 1916 dma-names = "rx", "tx"; 1917 }; 1918 ssiu33: ssiu-27 { 1919 dmas = <&audma0 0x25>, <&audma1 0x26>; 1920 dma-names = "rx", "tx"; 1921 }; 1922 ssiu34: ssiu-28 { 1923 dmas = <&audma0 0x27>, <&audma1 0x28>; 1924 dma-names = "rx", "tx"; 1925 }; 1926 ssiu35: ssiu-29 { 1927 dmas = <&audma0 0x29>, <&audma1 0x2A>; 1928 dma-names = "rx", "tx"; 1929 }; 1930 ssiu36: ssiu-30 { 1931 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 1932 dma-names = "rx", "tx"; 1933 }; 1934 ssiu37: ssiu-31 { 1935 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 1936 dma-names = "rx", "tx"; 1937 }; 1938 ssiu40: ssiu-32 { 1939 dmas = <&audma0 0x71>, <&audma1 0x72>; 1940 dma-names = "rx", "tx"; 1941 }; 1942 ssiu41: ssiu-33 { 1943 dmas = <&audma0 0x17>, <&audma1 0x18>; 1944 dma-names = "rx", "tx"; 1945 }; 1946 ssiu42: ssiu-34 { 1947 dmas = <&audma0 0x19>, <&audma1 0x1A>; 1948 dma-names = "rx", "tx"; 1949 }; 1950 ssiu43: ssiu-35 { 1951 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 1952 dma-names = "rx", "tx"; 1953 }; 1954 ssiu44: ssiu-36 { 1955 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 1956 dma-names = "rx", "tx"; 1957 }; 1958 ssiu45: ssiu-37 { 1959 dmas = <&audma0 0x1F>, <&audma1 0x20>; 1960 dma-names = "rx", "tx"; 1961 }; 1962 ssiu46: ssiu-38 { 1963 dmas = <&audma0 0x31>, <&audma1 0x32>; 1964 dma-names = "rx", "tx"; 1965 }; 1966 ssiu47: ssiu-39 { 1967 dmas = <&audma0 0x33>, <&audma1 0x34>; 1968 dma-names = "rx", "tx"; 1969 }; 1970 ssiu50: ssiu-40 { 1971 dmas = <&audma0 0x73>, <&audma1 0x74>; 1972 dma-names = "rx", "tx"; 1973 }; 1974 ssiu60: ssiu-41 { 1975 dmas = <&audma0 0x75>, <&audma1 0x76>; 1976 dma-names = "rx", "tx"; 1977 }; 1978 ssiu70: ssiu-42 { 1979 dmas = <&audma0 0x79>, <&audma1 0x7a>; 1980 dma-names = "rx", "tx"; 1981 }; 1982 ssiu80: ssiu-43 { 1983 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 1984 dma-names = "rx", "tx"; 1985 }; 1986 ssiu90: ssiu-44 { 1987 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 1988 dma-names = "rx", "tx"; 1989 }; 1990 ssiu91: ssiu-45 { 1991 dmas = <&audma0 0x7F>, <&audma1 0x80>; 1992 dma-names = "rx", "tx"; 1993 }; 1994 ssiu92: ssiu-46 { 1995 dmas = <&audma0 0x81>, <&audma1 0x82>; 1996 dma-names = "rx", "tx"; 1997 }; 1998 ssiu93: ssiu-47 { 1999 dmas = <&audma0 0x83>, <&audma1 0x84>; 2000 dma-names = "rx", "tx"; 2001 }; 2002 ssiu94: ssiu-48 { 2003 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2004 dma-names = "rx", "tx"; 2005 }; 2006 ssiu95: ssiu-49 { 2007 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2008 dma-names = "rx", "tx"; 2009 }; 2010 ssiu96: ssiu-50 { 2011 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2012 dma-names = "rx", "tx"; 2013 }; 2014 ssiu97: ssiu-51 { 2015 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2016 dma-names = "rx", "tx"; 2017 }; 2018 }; 2019 |
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1809 rcar_sound,ssi { 1810 ssi0: ssi-0 { 1811 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; | 2020 rcar_sound,ssi { 2021 ssi0: ssi-0 { 2022 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
1812 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; 1813 dma-names = "rx", "tx", "rxu", "txu"; | 2023 dmas = <&audma0 0x01>, <&audma1 0x02>; 2024 dma-names = "rx", "tx"; |
1814 }; 1815 ssi1: ssi-1 { 1816 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; | 2025 }; 2026 ssi1: ssi-1 { 2027 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
1817 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; 1818 dma-names = "rx", "tx", "rxu", "txu"; | 2028 dmas = <&audma0 0x03>, <&audma1 0x04>; 2029 dma-names = "rx", "tx"; |
1819 }; 1820 ssi2: ssi-2 { 1821 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; | 2030 }; 2031 ssi2: ssi-2 { 2032 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; |
1822 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; 1823 dma-names = "rx", "tx", "rxu", "txu"; | 2033 dmas = <&audma0 0x05>, <&audma1 0x06>; 2034 dma-names = "rx", "tx"; |
1824 }; 1825 ssi3: ssi-3 { 1826 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; | 2035 }; 2036 ssi3: ssi-3 { 2037 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; |
1827 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; 1828 dma-names = "rx", "tx", "rxu", "txu"; | 2038 dmas = <&audma0 0x07>, <&audma1 0x08>; 2039 dma-names = "rx", "tx"; |
1829 }; 1830 ssi4: ssi-4 { 1831 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; | 2040 }; 2041 ssi4: ssi-4 { 2042 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; |
1832 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; 1833 dma-names = "rx", "tx", "rxu", "txu"; | 2043 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2044 dma-names = "rx", "tx"; |
1834 }; 1835 ssi5: ssi-5 { 1836 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; | 2045 }; 2046 ssi5: ssi-5 { 2047 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; |
1837 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; 1838 dma-names = "rx", "tx", "rxu", "txu"; | 2048 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2049 dma-names = "rx", "tx"; |
1839 }; 1840 ssi6: ssi-6 { 1841 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; | 2050 }; 2051 ssi6: ssi-6 { 2052 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; |
1842 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; 1843 dma-names = "rx", "tx", "rxu", "txu"; | 2053 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2054 dma-names = "rx", "tx"; |
1844 }; 1845 ssi7: ssi-7 { 1846 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; | 2055 }; 2056 ssi7: ssi-7 { 2057 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; |
1847 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; 1848 dma-names = "rx", "tx", "rxu", "txu"; | 2058 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2059 dma-names = "rx", "tx"; |
1849 }; 1850 ssi8: ssi-8 { 1851 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; | 2060 }; 2061 ssi8: ssi-8 { 2062 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; |
1852 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; 1853 dma-names = "rx", "tx", "rxu", "txu"; | 2063 dmas = <&audma0 0x11>, <&audma1 0x12>; 2064 dma-names = "rx", "tx"; |
1854 }; 1855 ssi9: ssi-9 { 1856 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; | 2065 }; 2066 ssi9: ssi-9 { 2067 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; |
1857 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; 1858 dma-names = "rx", "tx", "rxu", "txu"; | 2068 dmas = <&audma0 0x13>, <&audma1 0x14>; 2069 dma-names = "rx", "tx"; |
1859 }; 1860 }; 1861 1862 ports { 1863 #address-cells = <1>; 1864 #size-cells = <0>; 1865 port@0 { 1866 reg = <0>; --- 720 unchanged lines hidden --- | 2070 }; 2071 }; 2072 2073 ports { 2074 #address-cells = <1>; 2075 #size-cells = <0>; 2076 port@0 { 2077 reg = <0>; --- 720 unchanged lines hidden --- |