r8a774a1.dtsi (b7f8f259896f669f131713b0c74ba4d008daa71d) r8a774a1.dtsi (0a96c05995ef1085f9c5e6bf005a04915dd2ec6f)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774a1 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

--- 2559 unchanged lines hidden (view full) ---

2568 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2569 resets = <&cpg 714>;
2570 status = "disabled";
2571
2572 ports {
2573 #address-cells = <1>;
2574 #size-cells = <0>;
2575
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774a1 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

--- 2559 unchanged lines hidden (view full) ---

2568 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2569 resets = <&cpg 714>;
2570 status = "disabled";
2571
2572 ports {
2573 #address-cells = <1>;
2574 #size-cells = <0>;
2575
2576 port@0 {
2577 reg = <0>;
2578 };
2579
2576 port@1 {
2577 #address-cells = <1>;
2578 #size-cells = <0>;
2579
2580 reg = <1>;
2581
2582 csi20vin0: endpoint@0 {
2583 reg = <0>;

--- 39 unchanged lines hidden (view full) ---

2623 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2624 resets = <&cpg 716>;
2625 status = "disabled";
2626
2627 ports {
2628 #address-cells = <1>;
2629 #size-cells = <0>;
2630
2580 port@1 {
2581 #address-cells = <1>;
2582 #size-cells = <0>;
2583
2584 reg = <1>;
2585
2586 csi20vin0: endpoint@0 {
2587 reg = <0>;

--- 39 unchanged lines hidden (view full) ---

2627 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2628 resets = <&cpg 716>;
2629 status = "disabled";
2630
2631 ports {
2632 #address-cells = <1>;
2633 #size-cells = <0>;
2634
2635 port@0 {
2636 reg = <0>;
2637 };
2638
2631 port@1 {
2632 #address-cells = <1>;
2633 #size-cells = <0>;
2634
2635 reg = <1>;
2636
2637 csi40vin0: endpoint@0 {
2638 reg = <0>;

--- 223 unchanged lines hidden --- 		2639 port@1 {
2640 #address-cells = <1>;
2641 #size-cells = <0>;
2642
2643 reg = <1>;
2644
2645 csi40vin0: endpoint@0 {
2646 reg = <0>;

--- 223 unchanged lines hidden ---