r8a774a1.dtsi (0ea0397a3a12f9720d6acb78a48da796a54e81aa) | r8a774a1.dtsi (aeee3d9cb776542f5700425f703fa78c70a1dcd0) |
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1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a774a1 SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/renesas-cpg-mssr.h> | 1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a774a1 SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/renesas-cpg-mssr.h> |
11#include <dt-bindings/power/r8a774a1-sysc.h> |
|
11 12/ { 13 compatible = "renesas,r8a774a1"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; --- 39 unchanged lines hidden (view full) --- 58 cpus { 59 #address-cells = <1>; 60 #size-cells = <0>; 61 62 a57_0: cpu@0 { 63 compatible = "arm,cortex-a57", "arm,armv8"; 64 reg = <0x0>; 65 device_type = "cpu"; | 12 13/ { 14 compatible = "renesas,r8a774a1"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 aliases { 19 i2c0 = &i2c0; --- 39 unchanged lines hidden (view full) --- 59 cpus { 60 #address-cells = <1>; 61 #size-cells = <0>; 62 63 a57_0: cpu@0 { 64 compatible = "arm,cortex-a57", "arm,armv8"; 65 reg = <0x0>; 66 device_type = "cpu"; |
66 power-domains = <&sysc 0>; | 67 power-domains = <&sysc R8A774A1_PD_CA57_CPU0>; |
67 next-level-cache = <&L2_CA57>; 68 enable-method = "psci"; 69 clocks = <&cpg CPG_CORE 0>; 70 }; 71 72 a57_1: cpu@1 { 73 compatible = "arm,cortex-a57", "arm,armv8"; 74 reg = <0x1>; 75 device_type = "cpu"; | 68 next-level-cache = <&L2_CA57>; 69 enable-method = "psci"; 70 clocks = <&cpg CPG_CORE 0>; 71 }; 72 73 a57_1: cpu@1 { 74 compatible = "arm,cortex-a57", "arm,armv8"; 75 reg = <0x1>; 76 device_type = "cpu"; |
76 power-domains = <&sysc 1>; | 77 power-domains = <&sysc R8A774A1_PD_CA57_CPU1>; |
77 next-level-cache = <&L2_CA57>; 78 enable-method = "psci"; 79 clocks = <&cpg CPG_CORE 0>; 80 }; 81 82 a53_0: cpu@100 { 83 compatible = "arm,cortex-a53", "arm,armv8"; 84 reg = <0x100>; 85 device_type = "cpu"; | 78 next-level-cache = <&L2_CA57>; 79 enable-method = "psci"; 80 clocks = <&cpg CPG_CORE 0>; 81 }; 82 83 a53_0: cpu@100 { 84 compatible = "arm,cortex-a53", "arm,armv8"; 85 reg = <0x100>; 86 device_type = "cpu"; |
86 power-domains = <&sysc 5>; | 87 power-domains = <&sysc R8A774A1_PD_CA53_CPU0>; |
87 next-level-cache = <&L2_CA53>; 88 enable-method = "psci"; 89 clocks =<&cpg CPG_CORE 1>; 90 }; 91 92 a53_1: cpu@101 { 93 compatible = "arm,cortex-a53", "arm,armv8"; 94 reg = <0x101>; 95 device_type = "cpu"; | 88 next-level-cache = <&L2_CA53>; 89 enable-method = "psci"; 90 clocks =<&cpg CPG_CORE 1>; 91 }; 92 93 a53_1: cpu@101 { 94 compatible = "arm,cortex-a53", "arm,armv8"; 95 reg = <0x101>; 96 device_type = "cpu"; |
96 power-domains = <&sysc 6>; | 97 power-domains = <&sysc R8A774A1_PD_CA53_CPU1>; |
97 next-level-cache = <&L2_CA53>; 98 enable-method = "psci"; 99 clocks =<&cpg CPG_CORE 1>; 100 }; 101 102 a53_2: cpu@102 { 103 compatible = "arm,cortex-a53", "arm,armv8"; 104 reg = <0x102>; 105 device_type = "cpu"; | 98 next-level-cache = <&L2_CA53>; 99 enable-method = "psci"; 100 clocks =<&cpg CPG_CORE 1>; 101 }; 102 103 a53_2: cpu@102 { 104 compatible = "arm,cortex-a53", "arm,armv8"; 105 reg = <0x102>; 106 device_type = "cpu"; |
106 power-domains = <&sysc 7>; | 107 power-domains = <&sysc R8A774A1_PD_CA53_CPU2>; |
107 next-level-cache = <&L2_CA53>; 108 enable-method = "psci"; 109 clocks =<&cpg CPG_CORE 1>; 110 }; 111 112 a53_3: cpu@103 { 113 compatible = "arm,cortex-a53", "arm,armv8"; 114 reg = <0x103>; 115 device_type = "cpu"; | 108 next-level-cache = <&L2_CA53>; 109 enable-method = "psci"; 110 clocks =<&cpg CPG_CORE 1>; 111 }; 112 113 a53_3: cpu@103 { 114 compatible = "arm,cortex-a53", "arm,armv8"; 115 reg = <0x103>; 116 device_type = "cpu"; |
116 power-domains = <&sysc 8>; | 117 power-domains = <&sysc R8A774A1_PD_CA53_CPU3>; |
117 next-level-cache = <&L2_CA53>; 118 enable-method = "psci"; 119 clocks =<&cpg CPG_CORE 1>; 120 }; 121 122 L2_CA57: cache-controller-0 { 123 compatible = "cache"; | 118 next-level-cache = <&L2_CA53>; 119 enable-method = "psci"; 120 clocks =<&cpg CPG_CORE 1>; 121 }; 122 123 L2_CA57: cache-controller-0 { 124 compatible = "cache"; |
124 power-domains = <&sysc 12>; | 125 power-domains = <&sysc R8A774A1_PD_CA57_SCU>; |
125 cache-unified; 126 cache-level = <2>; 127 }; 128 129 L2_CA53: cache-controller-1 { 130 compatible = "cache"; | 126 cache-unified; 127 cache-level = <2>; 128 }; 129 130 L2_CA53: cache-controller-1 { 131 compatible = "cache"; |
131 power-domains = <&sysc 21>; | 132 power-domains = <&sysc R8A774A1_PD_CA53_SCU>; |
132 cache-unified; 133 cache-level = <2>; 134 }; 135 }; 136 137 extal_clk: extal { 138 compatible = "fixed-clock"; 139 #clock-cells = <0>; --- 50 unchanged lines hidden (view full) --- 190 #size-cells = <2>; 191 ranges; 192 193 rwdt: watchdog@e6020000 { 194 compatible = "renesas,r8a774a1-wdt", 195 "renesas,rcar-gen3-wdt"; 196 reg = <0 0xe6020000 0 0x0c>; 197 clocks = <&cpg CPG_MOD 402>; | 133 cache-unified; 134 cache-level = <2>; 135 }; 136 }; 137 138 extal_clk: extal { 139 compatible = "fixed-clock"; 140 #clock-cells = <0>; --- 50 unchanged lines hidden (view full) --- 191 #size-cells = <2>; 192 ranges; 193 194 rwdt: watchdog@e6020000 { 195 compatible = "renesas,r8a774a1-wdt", 196 "renesas,rcar-gen3-wdt"; 197 reg = <0 0xe6020000 0 0x0c>; 198 clocks = <&cpg CPG_MOD 402>; |
198 power-domains = <&sysc 32>; | 199 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
199 resets = <&cpg 402>; 200 status = "disabled"; 201 }; 202 203 gpio0: gpio@e6050000 { 204 compatible = "renesas,gpio-r8a774a1", 205 "renesas,rcar-gen3-gpio"; 206 reg = <0 0xe6050000 0 0x50>; 207 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 208 #gpio-cells = <2>; 209 gpio-controller; 210 gpio-ranges = <&pfc 0 0 16>; 211 #interrupt-cells = <2>; 212 interrupt-controller; 213 clocks = <&cpg CPG_MOD 912>; | 200 resets = <&cpg 402>; 201 status = "disabled"; 202 }; 203 204 gpio0: gpio@e6050000 { 205 compatible = "renesas,gpio-r8a774a1", 206 "renesas,rcar-gen3-gpio"; 207 reg = <0 0xe6050000 0 0x50>; 208 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 209 #gpio-cells = <2>; 210 gpio-controller; 211 gpio-ranges = <&pfc 0 0 16>; 212 #interrupt-cells = <2>; 213 interrupt-controller; 214 clocks = <&cpg CPG_MOD 912>; |
214 power-domains = <&sysc 32>; | 215 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
215 resets = <&cpg 912>; 216 }; 217 218 gpio1: gpio@e6051000 { 219 compatible = "renesas,gpio-r8a774a1", 220 "renesas,rcar-gen3-gpio"; 221 reg = <0 0xe6051000 0 0x50>; 222 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 223 #gpio-cells = <2>; 224 gpio-controller; 225 gpio-ranges = <&pfc 0 32 29>; 226 #interrupt-cells = <2>; 227 interrupt-controller; 228 clocks = <&cpg CPG_MOD 911>; | 216 resets = <&cpg 912>; 217 }; 218 219 gpio1: gpio@e6051000 { 220 compatible = "renesas,gpio-r8a774a1", 221 "renesas,rcar-gen3-gpio"; 222 reg = <0 0xe6051000 0 0x50>; 223 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 224 #gpio-cells = <2>; 225 gpio-controller; 226 gpio-ranges = <&pfc 0 32 29>; 227 #interrupt-cells = <2>; 228 interrupt-controller; 229 clocks = <&cpg CPG_MOD 911>; |
229 power-domains = <&sysc 32>; | 230 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
230 resets = <&cpg 911>; 231 }; 232 233 gpio2: gpio@e6052000 { 234 compatible = "renesas,gpio-r8a774a1", 235 "renesas,rcar-gen3-gpio"; 236 reg = <0 0xe6052000 0 0x50>; 237 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 238 #gpio-cells = <2>; 239 gpio-controller; 240 gpio-ranges = <&pfc 0 64 15>; 241 #interrupt-cells = <2>; 242 interrupt-controller; 243 clocks = <&cpg CPG_MOD 910>; | 231 resets = <&cpg 911>; 232 }; 233 234 gpio2: gpio@e6052000 { 235 compatible = "renesas,gpio-r8a774a1", 236 "renesas,rcar-gen3-gpio"; 237 reg = <0 0xe6052000 0 0x50>; 238 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 239 #gpio-cells = <2>; 240 gpio-controller; 241 gpio-ranges = <&pfc 0 64 15>; 242 #interrupt-cells = <2>; 243 interrupt-controller; 244 clocks = <&cpg CPG_MOD 910>; |
244 power-domains = <&sysc 32>; | 245 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
245 resets = <&cpg 910>; 246 }; 247 248 gpio3: gpio@e6053000 { 249 compatible = "renesas,gpio-r8a774a1", 250 "renesas,rcar-gen3-gpio"; 251 reg = <0 0xe6053000 0 0x50>; 252 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 253 #gpio-cells = <2>; 254 gpio-controller; 255 gpio-ranges = <&pfc 0 96 16>; 256 #interrupt-cells = <2>; 257 interrupt-controller; 258 clocks = <&cpg CPG_MOD 909>; | 246 resets = <&cpg 910>; 247 }; 248 249 gpio3: gpio@e6053000 { 250 compatible = "renesas,gpio-r8a774a1", 251 "renesas,rcar-gen3-gpio"; 252 reg = <0 0xe6053000 0 0x50>; 253 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 254 #gpio-cells = <2>; 255 gpio-controller; 256 gpio-ranges = <&pfc 0 96 16>; 257 #interrupt-cells = <2>; 258 interrupt-controller; 259 clocks = <&cpg CPG_MOD 909>; |
259 power-domains = <&sysc 32>; | 260 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
260 resets = <&cpg 909>; 261 }; 262 263 gpio4: gpio@e6054000 { 264 compatible = "renesas,gpio-r8a774a1", 265 "renesas,rcar-gen3-gpio"; 266 reg = <0 0xe6054000 0 0x50>; 267 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 268 #gpio-cells = <2>; 269 gpio-controller; 270 gpio-ranges = <&pfc 0 128 18>; 271 #interrupt-cells = <2>; 272 interrupt-controller; 273 clocks = <&cpg CPG_MOD 908>; | 261 resets = <&cpg 909>; 262 }; 263 264 gpio4: gpio@e6054000 { 265 compatible = "renesas,gpio-r8a774a1", 266 "renesas,rcar-gen3-gpio"; 267 reg = <0 0xe6054000 0 0x50>; 268 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 269 #gpio-cells = <2>; 270 gpio-controller; 271 gpio-ranges = <&pfc 0 128 18>; 272 #interrupt-cells = <2>; 273 interrupt-controller; 274 clocks = <&cpg CPG_MOD 908>; |
274 power-domains = <&sysc 32>; | 275 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
275 resets = <&cpg 908>; 276 }; 277 278 gpio5: gpio@e6055000 { 279 compatible = "renesas,gpio-r8a774a1", 280 "renesas,rcar-gen3-gpio"; 281 reg = <0 0xe6055000 0 0x50>; 282 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 283 #gpio-cells = <2>; 284 gpio-controller; 285 gpio-ranges = <&pfc 0 160 26>; 286 #interrupt-cells = <2>; 287 interrupt-controller; 288 clocks = <&cpg CPG_MOD 907>; | 276 resets = <&cpg 908>; 277 }; 278 279 gpio5: gpio@e6055000 { 280 compatible = "renesas,gpio-r8a774a1", 281 "renesas,rcar-gen3-gpio"; 282 reg = <0 0xe6055000 0 0x50>; 283 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 284 #gpio-cells = <2>; 285 gpio-controller; 286 gpio-ranges = <&pfc 0 160 26>; 287 #interrupt-cells = <2>; 288 interrupt-controller; 289 clocks = <&cpg CPG_MOD 907>; |
289 power-domains = <&sysc 32>; | 290 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
290 resets = <&cpg 907>; 291 }; 292 293 gpio6: gpio@e6055400 { 294 compatible = "renesas,gpio-r8a774a1", 295 "renesas,rcar-gen3-gpio"; 296 reg = <0 0xe6055400 0 0x50>; 297 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 298 #gpio-cells = <2>; 299 gpio-controller; 300 gpio-ranges = <&pfc 0 192 32>; 301 #interrupt-cells = <2>; 302 interrupt-controller; 303 clocks = <&cpg CPG_MOD 906>; | 291 resets = <&cpg 907>; 292 }; 293 294 gpio6: gpio@e6055400 { 295 compatible = "renesas,gpio-r8a774a1", 296 "renesas,rcar-gen3-gpio"; 297 reg = <0 0xe6055400 0 0x50>; 298 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 299 #gpio-cells = <2>; 300 gpio-controller; 301 gpio-ranges = <&pfc 0 192 32>; 302 #interrupt-cells = <2>; 303 interrupt-controller; 304 clocks = <&cpg CPG_MOD 906>; |
304 power-domains = <&sysc 32>; | 305 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
305 resets = <&cpg 906>; 306 }; 307 308 gpio7: gpio@e6055800 { 309 compatible = "renesas,gpio-r8a774a1", 310 "renesas,rcar-gen3-gpio"; 311 reg = <0 0xe6055800 0 0x50>; 312 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 313 #gpio-cells = <2>; 314 gpio-controller; 315 gpio-ranges = <&pfc 0 224 4>; 316 #interrupt-cells = <2>; 317 interrupt-controller; 318 clocks = <&cpg CPG_MOD 905>; | 306 resets = <&cpg 906>; 307 }; 308 309 gpio7: gpio@e6055800 { 310 compatible = "renesas,gpio-r8a774a1", 311 "renesas,rcar-gen3-gpio"; 312 reg = <0 0xe6055800 0 0x50>; 313 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 314 #gpio-cells = <2>; 315 gpio-controller; 316 gpio-ranges = <&pfc 0 224 4>; 317 #interrupt-cells = <2>; 318 interrupt-controller; 319 clocks = <&cpg CPG_MOD 905>; |
319 power-domains = <&sysc 32>; | 320 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
320 resets = <&cpg 905>; 321 }; 322 323 pfc: pin-controller@e6060000 { 324 compatible = "renesas,pfc-r8a774a1"; 325 reg = <0 0xe6060000 0 0x50c>; 326 }; 327 --- 22 unchanged lines hidden (view full) --- 350 compatible = "renesas,r8a774a1-thermal"; 351 reg = <0 0xe6198000 0 0x100>, 352 <0 0xe61a0000 0 0x100>, 353 <0 0xe61a8000 0 0x100>; 354 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 355 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 356 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 357 clocks = <&cpg CPG_MOD 522>; | 321 resets = <&cpg 905>; 322 }; 323 324 pfc: pin-controller@e6060000 { 325 compatible = "renesas,pfc-r8a774a1"; 326 reg = <0 0xe6060000 0 0x50c>; 327 }; 328 --- 22 unchanged lines hidden (view full) --- 351 compatible = "renesas,r8a774a1-thermal"; 352 reg = <0 0xe6198000 0 0x100>, 353 <0 0xe61a0000 0 0x100>, 354 <0 0xe61a8000 0 0x100>; 355 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 356 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 357 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 358 clocks = <&cpg CPG_MOD 522>; |
358 power-domains = <&sysc 32>; | 359 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
359 resets = <&cpg 522>; 360 #thermal-sensor-cells = <1>; 361 }; 362 363 intc_ex: interrupt-controller@e61c0000 { 364 compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc"; 365 #interrupt-cells = <2>; 366 interrupt-controller; 367 reg = <0 0xe61c0000 0 0x200>; 368 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 369 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 370 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 371 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 372 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 373 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 374 clocks = <&cpg CPG_MOD 407>; | 360 resets = <&cpg 522>; 361 #thermal-sensor-cells = <1>; 362 }; 363 364 intc_ex: interrupt-controller@e61c0000 { 365 compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc"; 366 #interrupt-cells = <2>; 367 interrupt-controller; 368 reg = <0 0xe61c0000 0 0x200>; 369 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 370 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 371 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 372 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 373 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 374 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 375 clocks = <&cpg CPG_MOD 407>; |
375 power-domains = <&sysc 32>; | 376 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
376 resets = <&cpg 407>; 377 }; 378 379 i2c0: i2c@e6500000 { 380 #address-cells = <1>; 381 #size-cells = <0>; 382 compatible = "renesas,i2c-r8a774a1", 383 "renesas,rcar-gen3-i2c"; 384 reg = <0 0xe6500000 0 0x40>; 385 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 386 clocks = <&cpg CPG_MOD 931>; | 377 resets = <&cpg 407>; 378 }; 379 380 i2c0: i2c@e6500000 { 381 #address-cells = <1>; 382 #size-cells = <0>; 383 compatible = "renesas,i2c-r8a774a1", 384 "renesas,rcar-gen3-i2c"; 385 reg = <0 0xe6500000 0 0x40>; 386 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 387 clocks = <&cpg CPG_MOD 931>; |
387 power-domains = <&sysc 32>; | 388 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
388 resets = <&cpg 931>; 389 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 390 <&dmac2 0x91>, <&dmac2 0x90>; 391 dma-names = "tx", "rx", "tx", "rx"; 392 i2c-scl-internal-delay-ns = <110>; 393 status = "disabled"; 394 }; 395 396 i2c1: i2c@e6508000 { 397 #address-cells = <1>; 398 #size-cells = <0>; 399 compatible = "renesas,i2c-r8a774a1", 400 "renesas,rcar-gen3-i2c"; 401 reg = <0 0xe6508000 0 0x40>; 402 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 403 clocks = <&cpg CPG_MOD 930>; | 389 resets = <&cpg 931>; 390 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 391 <&dmac2 0x91>, <&dmac2 0x90>; 392 dma-names = "tx", "rx", "tx", "rx"; 393 i2c-scl-internal-delay-ns = <110>; 394 status = "disabled"; 395 }; 396 397 i2c1: i2c@e6508000 { 398 #address-cells = <1>; 399 #size-cells = <0>; 400 compatible = "renesas,i2c-r8a774a1", 401 "renesas,rcar-gen3-i2c"; 402 reg = <0 0xe6508000 0 0x40>; 403 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 404 clocks = <&cpg CPG_MOD 930>; |
404 power-domains = <&sysc 32>; | 405 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
405 resets = <&cpg 930>; 406 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 407 <&dmac2 0x93>, <&dmac2 0x92>; 408 dma-names = "tx", "rx", "tx", "rx"; 409 i2c-scl-internal-delay-ns = <6>; 410 status = "disabled"; 411 }; 412 413 i2c2: i2c@e6510000 { 414 #address-cells = <1>; 415 #size-cells = <0>; 416 compatible = "renesas,i2c-r8a774a1", 417 "renesas,rcar-gen3-i2c"; 418 reg = <0 0xe6510000 0 0x40>; 419 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 420 clocks = <&cpg CPG_MOD 929>; | 406 resets = <&cpg 930>; 407 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 408 <&dmac2 0x93>, <&dmac2 0x92>; 409 dma-names = "tx", "rx", "tx", "rx"; 410 i2c-scl-internal-delay-ns = <6>; 411 status = "disabled"; 412 }; 413 414 i2c2: i2c@e6510000 { 415 #address-cells = <1>; 416 #size-cells = <0>; 417 compatible = "renesas,i2c-r8a774a1", 418 "renesas,rcar-gen3-i2c"; 419 reg = <0 0xe6510000 0 0x40>; 420 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 421 clocks = <&cpg CPG_MOD 929>; |
421 power-domains = <&sysc 32>; | 422 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
422 resets = <&cpg 929>; 423 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 424 <&dmac2 0x95>, <&dmac2 0x94>; 425 dma-names = "tx", "rx", "tx", "rx"; 426 i2c-scl-internal-delay-ns = <6>; 427 status = "disabled"; 428 }; 429 430 i2c3: i2c@e66d0000 { 431 #address-cells = <1>; 432 #size-cells = <0>; 433 compatible = "renesas,i2c-r8a774a1", 434 "renesas,rcar-gen3-i2c"; 435 reg = <0 0xe66d0000 0 0x40>; 436 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 437 clocks = <&cpg CPG_MOD 928>; | 423 resets = <&cpg 929>; 424 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 425 <&dmac2 0x95>, <&dmac2 0x94>; 426 dma-names = "tx", "rx", "tx", "rx"; 427 i2c-scl-internal-delay-ns = <6>; 428 status = "disabled"; 429 }; 430 431 i2c3: i2c@e66d0000 { 432 #address-cells = <1>; 433 #size-cells = <0>; 434 compatible = "renesas,i2c-r8a774a1", 435 "renesas,rcar-gen3-i2c"; 436 reg = <0 0xe66d0000 0 0x40>; 437 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 438 clocks = <&cpg CPG_MOD 928>; |
438 power-domains = <&sysc 32>; | 439 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
439 resets = <&cpg 928>; 440 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 441 dma-names = "tx", "rx"; 442 i2c-scl-internal-delay-ns = <110>; 443 status = "disabled"; 444 }; 445 446 i2c4: i2c@e66d8000 { 447 #address-cells = <1>; 448 #size-cells = <0>; 449 compatible = "renesas,i2c-r8a774a1", 450 "renesas,rcar-gen3-i2c"; 451 reg = <0 0xe66d8000 0 0x40>; 452 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 453 clocks = <&cpg CPG_MOD 927>; | 440 resets = <&cpg 928>; 441 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 442 dma-names = "tx", "rx"; 443 i2c-scl-internal-delay-ns = <110>; 444 status = "disabled"; 445 }; 446 447 i2c4: i2c@e66d8000 { 448 #address-cells = <1>; 449 #size-cells = <0>; 450 compatible = "renesas,i2c-r8a774a1", 451 "renesas,rcar-gen3-i2c"; 452 reg = <0 0xe66d8000 0 0x40>; 453 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 454 clocks = <&cpg CPG_MOD 927>; |
454 power-domains = <&sysc 32>; | 455 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
455 resets = <&cpg 927>; 456 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 457 dma-names = "tx", "rx"; 458 i2c-scl-internal-delay-ns = <110>; 459 status = "disabled"; 460 }; 461 462 i2c5: i2c@e66e0000 { 463 #address-cells = <1>; 464 #size-cells = <0>; 465 compatible = "renesas,i2c-r8a774a1", 466 "renesas,rcar-gen3-i2c"; 467 reg = <0 0xe66e0000 0 0x40>; 468 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 469 clocks = <&cpg CPG_MOD 919>; | 456 resets = <&cpg 927>; 457 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 458 dma-names = "tx", "rx"; 459 i2c-scl-internal-delay-ns = <110>; 460 status = "disabled"; 461 }; 462 463 i2c5: i2c@e66e0000 { 464 #address-cells = <1>; 465 #size-cells = <0>; 466 compatible = "renesas,i2c-r8a774a1", 467 "renesas,rcar-gen3-i2c"; 468 reg = <0 0xe66e0000 0 0x40>; 469 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 470 clocks = <&cpg CPG_MOD 919>; |
470 power-domains = <&sysc 32>; | 471 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
471 resets = <&cpg 919>; 472 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 473 dma-names = "tx", "rx"; 474 i2c-scl-internal-delay-ns = <110>; 475 status = "disabled"; 476 }; 477 478 i2c6: i2c@e66e8000 { 479 #address-cells = <1>; 480 #size-cells = <0>; 481 compatible = "renesas,i2c-r8a774a1", 482 "renesas,rcar-gen3-i2c"; 483 reg = <0 0xe66e8000 0 0x40>; 484 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 485 clocks = <&cpg CPG_MOD 918>; | 472 resets = <&cpg 919>; 473 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 474 dma-names = "tx", "rx"; 475 i2c-scl-internal-delay-ns = <110>; 476 status = "disabled"; 477 }; 478 479 i2c6: i2c@e66e8000 { 480 #address-cells = <1>; 481 #size-cells = <0>; 482 compatible = "renesas,i2c-r8a774a1", 483 "renesas,rcar-gen3-i2c"; 484 reg = <0 0xe66e8000 0 0x40>; 485 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 486 clocks = <&cpg CPG_MOD 918>; |
486 power-domains = <&sysc 32>; | 487 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
487 resets = <&cpg 918>; 488 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 489 dma-names = "tx", "rx"; 490 i2c-scl-internal-delay-ns = <6>; 491 status = "disabled"; 492 }; 493 494 i2c_dvfs: i2c@e60b0000 { 495 #address-cells = <1>; 496 #size-cells = <0>; 497 compatible = "renesas,iic-r8a774a1", 498 "renesas,rcar-gen3-iic", 499 "renesas,rmobile-iic"; 500 reg = <0 0xe60b0000 0 0x425>; 501 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 502 clocks = <&cpg CPG_MOD 926>; | 488 resets = <&cpg 918>; 489 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 490 dma-names = "tx", "rx"; 491 i2c-scl-internal-delay-ns = <6>; 492 status = "disabled"; 493 }; 494 495 i2c_dvfs: i2c@e60b0000 { 496 #address-cells = <1>; 497 #size-cells = <0>; 498 compatible = "renesas,iic-r8a774a1", 499 "renesas,rcar-gen3-iic", 500 "renesas,rmobile-iic"; 501 reg = <0 0xe60b0000 0 0x425>; 502 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 503 clocks = <&cpg CPG_MOD 926>; |
503 power-domains = <&sysc 32>; | 504 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
504 resets = <&cpg 926>; 505 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 506 dma-names = "tx", "rx"; 507 status = "disabled"; 508 }; 509 510 hscif0: serial@e6540000 { 511 compatible = "renesas,hscif-r8a774a1", 512 "renesas,rcar-gen3-hscif", 513 "renesas,hscif"; 514 reg = <0 0xe6540000 0 0x60>; 515 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 516 clocks = <&cpg CPG_MOD 520>, 517 <&cpg CPG_CORE 19>, 518 <&scif_clk>; 519 clock-names = "fck", "brg_int", "scif_clk"; 520 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 521 <&dmac2 0x31>, <&dmac2 0x30>; 522 dma-names = "tx", "rx", "tx", "rx"; | 505 resets = <&cpg 926>; 506 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 507 dma-names = "tx", "rx"; 508 status = "disabled"; 509 }; 510 511 hscif0: serial@e6540000 { 512 compatible = "renesas,hscif-r8a774a1", 513 "renesas,rcar-gen3-hscif", 514 "renesas,hscif"; 515 reg = <0 0xe6540000 0 0x60>; 516 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 517 clocks = <&cpg CPG_MOD 520>, 518 <&cpg CPG_CORE 19>, 519 <&scif_clk>; 520 clock-names = "fck", "brg_int", "scif_clk"; 521 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 522 <&dmac2 0x31>, <&dmac2 0x30>; 523 dma-names = "tx", "rx", "tx", "rx"; |
523 power-domains = <&sysc 32>; | 524 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
524 resets = <&cpg 520>; 525 status = "disabled"; 526 }; 527 528 hscif1: serial@e6550000 { 529 compatible = "renesas,hscif-r8a774a1", 530 "renesas,rcar-gen3-hscif", 531 "renesas,hscif"; 532 reg = <0 0xe6550000 0 0x60>; 533 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 534 clocks = <&cpg CPG_MOD 519>, 535 <&cpg CPG_CORE 19>, 536 <&scif_clk>; 537 clock-names = "fck", "brg_int", "scif_clk"; 538 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 539 <&dmac2 0x33>, <&dmac2 0x32>; 540 dma-names = "tx", "rx", "tx", "rx"; | 525 resets = <&cpg 520>; 526 status = "disabled"; 527 }; 528 529 hscif1: serial@e6550000 { 530 compatible = "renesas,hscif-r8a774a1", 531 "renesas,rcar-gen3-hscif", 532 "renesas,hscif"; 533 reg = <0 0xe6550000 0 0x60>; 534 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 535 clocks = <&cpg CPG_MOD 519>, 536 <&cpg CPG_CORE 19>, 537 <&scif_clk>; 538 clock-names = "fck", "brg_int", "scif_clk"; 539 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 540 <&dmac2 0x33>, <&dmac2 0x32>; 541 dma-names = "tx", "rx", "tx", "rx"; |
541 power-domains = <&sysc 32>; | 542 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
542 resets = <&cpg 519>; 543 status = "disabled"; 544 }; 545 546 hscif2: serial@e6560000 { 547 compatible = "renesas,hscif-r8a774a1", 548 "renesas,rcar-gen3-hscif", 549 "renesas,hscif"; 550 reg = <0 0xe6560000 0 0x60>; 551 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 552 clocks = <&cpg CPG_MOD 518>, 553 <&cpg CPG_CORE 19>, 554 <&scif_clk>; 555 clock-names = "fck", "brg_int", "scif_clk"; 556 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 557 <&dmac2 0x35>, <&dmac2 0x34>; 558 dma-names = "tx", "rx", "tx", "rx"; | 543 resets = <&cpg 519>; 544 status = "disabled"; 545 }; 546 547 hscif2: serial@e6560000 { 548 compatible = "renesas,hscif-r8a774a1", 549 "renesas,rcar-gen3-hscif", 550 "renesas,hscif"; 551 reg = <0 0xe6560000 0 0x60>; 552 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 553 clocks = <&cpg CPG_MOD 518>, 554 <&cpg CPG_CORE 19>, 555 <&scif_clk>; 556 clock-names = "fck", "brg_int", "scif_clk"; 557 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 558 <&dmac2 0x35>, <&dmac2 0x34>; 559 dma-names = "tx", "rx", "tx", "rx"; |
559 power-domains = <&sysc 32>; | 560 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
560 resets = <&cpg 518>; 561 status = "disabled"; 562 }; 563 564 hscif3: serial@e66a0000 { 565 compatible = "renesas,hscif-r8a774a1", 566 "renesas,rcar-gen3-hscif", 567 "renesas,hscif"; 568 reg = <0 0xe66a0000 0 0x60>; 569 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 570 clocks = <&cpg CPG_MOD 517>, 571 <&cpg CPG_CORE 19>, 572 <&scif_clk>; 573 clock-names = "fck", "brg_int", "scif_clk"; 574 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 575 dma-names = "tx", "rx"; | 561 resets = <&cpg 518>; 562 status = "disabled"; 563 }; 564 565 hscif3: serial@e66a0000 { 566 compatible = "renesas,hscif-r8a774a1", 567 "renesas,rcar-gen3-hscif", 568 "renesas,hscif"; 569 reg = <0 0xe66a0000 0 0x60>; 570 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 571 clocks = <&cpg CPG_MOD 517>, 572 <&cpg CPG_CORE 19>, 573 <&scif_clk>; 574 clock-names = "fck", "brg_int", "scif_clk"; 575 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 576 dma-names = "tx", "rx"; |
576 power-domains = <&sysc 32>; | 577 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
577 resets = <&cpg 517>; 578 status = "disabled"; 579 }; 580 581 hscif4: serial@e66b0000 { 582 compatible = "renesas,hscif-r8a774a1", 583 "renesas,rcar-gen3-hscif", 584 "renesas,hscif"; 585 reg = <0 0xe66b0000 0 0x60>; 586 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 587 clocks = <&cpg CPG_MOD 516>, 588 <&cpg CPG_CORE 19>, 589 <&scif_clk>; 590 clock-names = "fck", "brg_int", "scif_clk"; 591 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 592 dma-names = "tx", "rx"; | 578 resets = <&cpg 517>; 579 status = "disabled"; 580 }; 581 582 hscif4: serial@e66b0000 { 583 compatible = "renesas,hscif-r8a774a1", 584 "renesas,rcar-gen3-hscif", 585 "renesas,hscif"; 586 reg = <0 0xe66b0000 0 0x60>; 587 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 588 clocks = <&cpg CPG_MOD 516>, 589 <&cpg CPG_CORE 19>, 590 <&scif_clk>; 591 clock-names = "fck", "brg_int", "scif_clk"; 592 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 593 dma-names = "tx", "rx"; |
593 power-domains = <&sysc 32>; | 594 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
594 resets = <&cpg 516>; 595 status = "disabled"; 596 }; 597 598 hsusb: usb@e6590000 { 599 compatible = "renesas,usbhs-r8a774a1", 600 "renesas,rcar-gen3-usbhs"; 601 reg = <0 0xe6590000 0 0x100>; 602 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 603 clocks = <&cpg CPG_MOD 704>; 604 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 605 <&usb_dmac1 0>, <&usb_dmac1 1>; 606 dma-names = "ch0", "ch1", "ch2", "ch3"; 607 renesas,buswait = <11>; 608 phys = <&usb2_phy0>; 609 phy-names = "usb"; | 595 resets = <&cpg 516>; 596 status = "disabled"; 597 }; 598 599 hsusb: usb@e6590000 { 600 compatible = "renesas,usbhs-r8a774a1", 601 "renesas,rcar-gen3-usbhs"; 602 reg = <0 0xe6590000 0 0x100>; 603 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 604 clocks = <&cpg CPG_MOD 704>; 605 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 606 <&usb_dmac1 0>, <&usb_dmac1 1>; 607 dma-names = "ch0", "ch1", "ch2", "ch3"; 608 renesas,buswait = <11>; 609 phys = <&usb2_phy0>; 610 phy-names = "usb"; |
610 power-domains = <&sysc 32>; | 611 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
611 resets = <&cpg 704>; 612 status = "disabled"; 613 }; 614 615 usb_dmac0: dma-controller@e65a0000 { 616 compatible = "renesas,r8a774a1-usb-dmac", 617 "renesas,usb-dmac"; 618 reg = <0 0xe65a0000 0 0x100>; 619 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 620 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 621 interrupt-names = "ch0", "ch1"; 622 clocks = <&cpg CPG_MOD 330>; | 612 resets = <&cpg 704>; 613 status = "disabled"; 614 }; 615 616 usb_dmac0: dma-controller@e65a0000 { 617 compatible = "renesas,r8a774a1-usb-dmac", 618 "renesas,usb-dmac"; 619 reg = <0 0xe65a0000 0 0x100>; 620 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 621 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 622 interrupt-names = "ch0", "ch1"; 623 clocks = <&cpg CPG_MOD 330>; |
623 power-domains = <&sysc 32>; | 624 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
624 resets = <&cpg 330>; 625 #dma-cells = <1>; 626 dma-channels = <2>; 627 }; 628 629 usb_dmac1: dma-controller@e65b0000 { 630 compatible = "renesas,r8a774a1-usb-dmac", 631 "renesas,usb-dmac"; 632 reg = <0 0xe65b0000 0 0x100>; 633 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 634 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 635 interrupt-names = "ch0", "ch1"; 636 clocks = <&cpg CPG_MOD 331>; | 625 resets = <&cpg 330>; 626 #dma-cells = <1>; 627 dma-channels = <2>; 628 }; 629 630 usb_dmac1: dma-controller@e65b0000 { 631 compatible = "renesas,r8a774a1-usb-dmac", 632 "renesas,usb-dmac"; 633 reg = <0 0xe65b0000 0 0x100>; 634 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 635 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 636 interrupt-names = "ch0", "ch1"; 637 clocks = <&cpg CPG_MOD 331>; |
637 power-domains = <&sysc 32>; | 638 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
638 resets = <&cpg 331>; 639 #dma-cells = <1>; 640 dma-channels = <2>; 641 }; 642 643 usb3_phy0: usb-phy@e65ee000 { 644 compatible = "renesas,r8a774a1-usb3-phy", 645 "renesas,rcar-gen3-usb3-phy"; 646 reg = <0 0xe65ee000 0 0x90>; 647 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 648 <&usb_extal_clk>; 649 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; | 639 resets = <&cpg 331>; 640 #dma-cells = <1>; 641 dma-channels = <2>; 642 }; 643 644 usb3_phy0: usb-phy@e65ee000 { 645 compatible = "renesas,r8a774a1-usb3-phy", 646 "renesas,rcar-gen3-usb3-phy"; 647 reg = <0 0xe65ee000 0 0x90>; 648 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 649 <&usb_extal_clk>; 650 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; |
650 power-domains = <&sysc 32>; | 651 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
651 resets = <&cpg 328>; 652 #phy-cells = <0>; 653 status = "disabled"; 654 }; 655 656 dmac0: dma-controller@e6700000 { 657 compatible = "renesas,dmac-r8a774a1", 658 "renesas,rcar-dmac"; --- 17 unchanged lines hidden (view full) --- 676 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 677 interrupt-names = "error", 678 "ch0", "ch1", "ch2", "ch3", 679 "ch4", "ch5", "ch6", "ch7", 680 "ch8", "ch9", "ch10", "ch11", 681 "ch12", "ch13", "ch14", "ch15"; 682 clocks = <&cpg CPG_MOD 219>; 683 clock-names = "fck"; | 652 resets = <&cpg 328>; 653 #phy-cells = <0>; 654 status = "disabled"; 655 }; 656 657 dmac0: dma-controller@e6700000 { 658 compatible = "renesas,dmac-r8a774a1", 659 "renesas,rcar-dmac"; --- 17 unchanged lines hidden (view full) --- 677 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 678 interrupt-names = "error", 679 "ch0", "ch1", "ch2", "ch3", 680 "ch4", "ch5", "ch6", "ch7", 681 "ch8", "ch9", "ch10", "ch11", 682 "ch12", "ch13", "ch14", "ch15"; 683 clocks = <&cpg CPG_MOD 219>; 684 clock-names = "fck"; |
684 power-domains = <&sysc 32>; | 685 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
685 resets = <&cpg 219>; 686 #dma-cells = <1>; 687 dma-channels = <16>; 688 }; 689 690 dmac1: dma-controller@e7300000 { 691 compatible = "renesas,dmac-r8a774a1", 692 "renesas,rcar-dmac"; --- 17 unchanged lines hidden (view full) --- 710 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 711 interrupt-names = "error", 712 "ch0", "ch1", "ch2", "ch3", 713 "ch4", "ch5", "ch6", "ch7", 714 "ch8", "ch9", "ch10", "ch11", 715 "ch12", "ch13", "ch14", "ch15"; 716 clocks = <&cpg CPG_MOD 218>; 717 clock-names = "fck"; | 686 resets = <&cpg 219>; 687 #dma-cells = <1>; 688 dma-channels = <16>; 689 }; 690 691 dmac1: dma-controller@e7300000 { 692 compatible = "renesas,dmac-r8a774a1", 693 "renesas,rcar-dmac"; --- 17 unchanged lines hidden (view full) --- 711 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 712 interrupt-names = "error", 713 "ch0", "ch1", "ch2", "ch3", 714 "ch4", "ch5", "ch6", "ch7", 715 "ch8", "ch9", "ch10", "ch11", 716 "ch12", "ch13", "ch14", "ch15"; 717 clocks = <&cpg CPG_MOD 218>; 718 clock-names = "fck"; |
718 power-domains = <&sysc 32>; | 719 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
719 resets = <&cpg 218>; 720 #dma-cells = <1>; 721 dma-channels = <16>; 722 }; 723 724 dmac2: dma-controller@e7310000 { 725 compatible = "renesas,dmac-r8a774a1", 726 "renesas,rcar-dmac"; --- 17 unchanged lines hidden (view full) --- 744 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 745 interrupt-names = "error", 746 "ch0", "ch1", "ch2", "ch3", 747 "ch4", "ch5", "ch6", "ch7", 748 "ch8", "ch9", "ch10", "ch11", 749 "ch12", "ch13", "ch14", "ch15"; 750 clocks = <&cpg CPG_MOD 217>; 751 clock-names = "fck"; | 720 resets = <&cpg 218>; 721 #dma-cells = <1>; 722 dma-channels = <16>; 723 }; 724 725 dmac2: dma-controller@e7310000 { 726 compatible = "renesas,dmac-r8a774a1", 727 "renesas,rcar-dmac"; --- 17 unchanged lines hidden (view full) --- 745 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 746 interrupt-names = "error", 747 "ch0", "ch1", "ch2", "ch3", 748 "ch4", "ch5", "ch6", "ch7", 749 "ch8", "ch9", "ch10", "ch11", 750 "ch12", "ch13", "ch14", "ch15"; 751 clocks = <&cpg CPG_MOD 217>; 752 clock-names = "fck"; |
752 power-domains = <&sysc 32>; | 753 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
753 resets = <&cpg 217>; 754 #dma-cells = <1>; 755 dma-channels = <16>; 756 }; 757 758 ipmmu_ds0: mmu@e6740000 { 759 compatible = "renesas,ipmmu-r8a774a1"; 760 reg = <0 0xe6740000 0 0x1000>; 761 renesas,ipmmu-main = <&ipmmu_mm 0>; | 754 resets = <&cpg 217>; 755 #dma-cells = <1>; 756 dma-channels = <16>; 757 }; 758 759 ipmmu_ds0: mmu@e6740000 { 760 compatible = "renesas,ipmmu-r8a774a1"; 761 reg = <0 0xe6740000 0 0x1000>; 762 renesas,ipmmu-main = <&ipmmu_mm 0>; |
762 power-domains = <&sysc 32>; | 763 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
763 #iommu-cells = <1>; 764 }; 765 766 ipmmu_ds1: mmu@e7740000 { 767 compatible = "renesas,ipmmu-r8a774a1"; 768 reg = <0 0xe7740000 0 0x1000>; 769 renesas,ipmmu-main = <&ipmmu_mm 1>; | 764 #iommu-cells = <1>; 765 }; 766 767 ipmmu_ds1: mmu@e7740000 { 768 compatible = "renesas,ipmmu-r8a774a1"; 769 reg = <0 0xe7740000 0 0x1000>; 770 renesas,ipmmu-main = <&ipmmu_mm 1>; |
770 power-domains = <&sysc 32>; | 771 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
771 #iommu-cells = <1>; 772 }; 773 774 ipmmu_hc: mmu@e6570000 { 775 compatible = "renesas,ipmmu-r8a774a1"; 776 reg = <0 0xe6570000 0 0x1000>; 777 renesas,ipmmu-main = <&ipmmu_mm 2>; | 772 #iommu-cells = <1>; 773 }; 774 775 ipmmu_hc: mmu@e6570000 { 776 compatible = "renesas,ipmmu-r8a774a1"; 777 reg = <0 0xe6570000 0 0x1000>; 778 renesas,ipmmu-main = <&ipmmu_mm 2>; |
778 power-domains = <&sysc 32>; | 779 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
779 #iommu-cells = <1>; 780 }; 781 782 ipmmu_mm: mmu@e67b0000 { 783 compatible = "renesas,ipmmu-r8a774a1"; 784 reg = <0 0xe67b0000 0 0x1000>; 785 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; | 780 #iommu-cells = <1>; 781 }; 782 783 ipmmu_mm: mmu@e67b0000 { 784 compatible = "renesas,ipmmu-r8a774a1"; 785 reg = <0 0xe67b0000 0 0x1000>; 786 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; |
787 power-domains = <&sysc 32>; | 788 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
788 #iommu-cells = <1>; 789 }; 790 791 ipmmu_mp: mmu@ec670000 { 792 compatible = "renesas,ipmmu-r8a774a1"; 793 reg = <0 0xec670000 0 0x1000>; 794 renesas,ipmmu-main = <&ipmmu_mm 4>; | 789 #iommu-cells = <1>; 790 }; 791 792 ipmmu_mp: mmu@ec670000 { 793 compatible = "renesas,ipmmu-r8a774a1"; 794 reg = <0 0xec670000 0 0x1000>; 795 renesas,ipmmu-main = <&ipmmu_mm 4>; |
795 power-domains = <&sysc 32>; | 796 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
796 #iommu-cells = <1>; 797 }; 798 799 ipmmu_pv0: mmu@fd800000 { 800 compatible = "renesas,ipmmu-r8a774a1"; 801 reg = <0 0xfd800000 0 0x1000>; 802 renesas,ipmmu-main = <&ipmmu_mm 5>; | 797 #iommu-cells = <1>; 798 }; 799 800 ipmmu_pv0: mmu@fd800000 { 801 compatible = "renesas,ipmmu-r8a774a1"; 802 reg = <0 0xfd800000 0 0x1000>; 803 renesas,ipmmu-main = <&ipmmu_mm 5>; |
803 power-domains = <&sysc 32>; | 804 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
804 #iommu-cells = <1>; 805 }; 806 807 ipmmu_pv1: mmu@fd950000 { 808 compatible = "renesas,ipmmu-r8a774a1"; 809 reg = <0 0xfd950000 0 0x1000>; 810 renesas,ipmmu-main = <&ipmmu_mm 6>; | 805 #iommu-cells = <1>; 806 }; 807 808 ipmmu_pv1: mmu@fd950000 { 809 compatible = "renesas,ipmmu-r8a774a1"; 810 reg = <0 0xfd950000 0 0x1000>; 811 renesas,ipmmu-main = <&ipmmu_mm 6>; |
811 power-domains = <&sysc 32>; | 812 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
812 #iommu-cells = <1>; 813 }; 814 815 ipmmu_vc0: mmu@fe6b0000 { 816 compatible = "renesas,ipmmu-r8a774a1"; 817 reg = <0 0xfe6b0000 0 0x1000>; 818 renesas,ipmmu-main = <&ipmmu_mm 8>; | 813 #iommu-cells = <1>; 814 }; 815 816 ipmmu_vc0: mmu@fe6b0000 { 817 compatible = "renesas,ipmmu-r8a774a1"; 818 reg = <0 0xfe6b0000 0 0x1000>; 819 renesas,ipmmu-main = <&ipmmu_mm 8>; |
819 power-domains = <&sysc 14>; | 820 power-domains = <&sysc R8A774A1_PD_A3VC>; |
820 #iommu-cells = <1>; 821 }; 822 823 ipmmu_vi0: mmu@febd0000 { 824 compatible = "renesas,ipmmu-r8a774a1"; 825 reg = <0 0xfebd0000 0 0x1000>; 826 renesas,ipmmu-main = <&ipmmu_mm 9>; | 821 #iommu-cells = <1>; 822 }; 823 824 ipmmu_vi0: mmu@febd0000 { 825 compatible = "renesas,ipmmu-r8a774a1"; 826 reg = <0 0xfebd0000 0 0x1000>; 827 renesas,ipmmu-main = <&ipmmu_mm 9>; |
827 power-domains = <&sysc 32>; | 828 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
828 #iommu-cells = <1>; 829 }; 830 831 avb: ethernet@e6800000 { 832 compatible = "renesas,etheravb-r8a774a1", 833 "renesas,etheravb-rcar-gen3"; 834 reg = <0 0xe6800000 0 0x800>; 835 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, --- 24 unchanged lines hidden (view full) --- 860 interrupt-names = "ch0", "ch1", "ch2", "ch3", 861 "ch4", "ch5", "ch6", "ch7", 862 "ch8", "ch9", "ch10", "ch11", 863 "ch12", "ch13", "ch14", "ch15", 864 "ch16", "ch17", "ch18", "ch19", 865 "ch20", "ch21", "ch22", "ch23", 866 "ch24"; 867 clocks = <&cpg CPG_MOD 812>; | 829 #iommu-cells = <1>; 830 }; 831 832 avb: ethernet@e6800000 { 833 compatible = "renesas,etheravb-r8a774a1", 834 "renesas,etheravb-rcar-gen3"; 835 reg = <0 0xe6800000 0 0x800>; 836 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, --- 24 unchanged lines hidden (view full) --- 861 interrupt-names = "ch0", "ch1", "ch2", "ch3", 862 "ch4", "ch5", "ch6", "ch7", 863 "ch8", "ch9", "ch10", "ch11", 864 "ch12", "ch13", "ch14", "ch15", 865 "ch16", "ch17", "ch18", "ch19", 866 "ch20", "ch21", "ch22", "ch23", 867 "ch24"; 868 clocks = <&cpg CPG_MOD 812>; |
868 power-domains = <&sysc 32>; | 869 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
869 resets = <&cpg 812>; 870 phy-mode = "rgmii"; 871 #address-cells = <1>; 872 #size-cells = <0>; 873 status = "disabled"; 874 }; 875 | 870 resets = <&cpg 812>; 871 phy-mode = "rgmii"; 872 #address-cells = <1>; 873 #size-cells = <0>; 874 status = "disabled"; 875 }; 876 |
877 can0: can@e6c30000 { 878 compatible = "renesas,can-r8a774a1", 879 "renesas,rcar-gen3-can"; 880 reg = <0 0xe6c30000 0 0x1000>; 881 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 882 clocks = <&cpg CPG_MOD 916>, <&can_clk>; 883 clock-names = "clkp1", "can_clk"; 884 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; 885 resets = <&cpg 916>; 886 status = "disabled"; 887 }; 888 889 can1: can@e6c38000 { 890 compatible = "renesas,can-r8a774a1", 891 "renesas,rcar-gen3-can"; 892 reg = <0 0xe6c38000 0 0x1000>; 893 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 894 clocks = <&cpg CPG_MOD 915>, <&can_clk>; 895 clock-names = "clkp1", "can_clk"; 896 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; 897 resets = <&cpg 915>; 898 status = "disabled"; 899 }; 900 |
|
876 pwm0: pwm@e6e30000 { 877 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 878 reg = <0 0xe6e30000 0 0x8>; 879 #pwm-cells = <2>; 880 clocks = <&cpg CPG_MOD 523>; 881 resets = <&cpg 523>; | 901 pwm0: pwm@e6e30000 { 902 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 903 reg = <0 0xe6e30000 0 0x8>; 904 #pwm-cells = <2>; 905 clocks = <&cpg CPG_MOD 523>; 906 resets = <&cpg 523>; |
882 power-domains = <&sysc 32>; | 907 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
883 status = "disabled"; 884 }; 885 886 pwm1: pwm@e6e31000 { 887 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 888 reg = <0 0xe6e31000 0 0x8>; 889 #pwm-cells = <2>; 890 clocks = <&cpg CPG_MOD 523>; 891 resets = <&cpg 523>; | 908 status = "disabled"; 909 }; 910 911 pwm1: pwm@e6e31000 { 912 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 913 reg = <0 0xe6e31000 0 0x8>; 914 #pwm-cells = <2>; 915 clocks = <&cpg CPG_MOD 523>; 916 resets = <&cpg 523>; |
892 power-domains = <&sysc 32>; | 917 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
893 status = "disabled"; 894 }; 895 896 pwm2: pwm@e6e32000 { 897 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 898 reg = <0 0xe6e32000 0 0x8>; 899 #pwm-cells = <2>; 900 clocks = <&cpg CPG_MOD 523>; 901 resets = <&cpg 523>; | 918 status = "disabled"; 919 }; 920 921 pwm2: pwm@e6e32000 { 922 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 923 reg = <0 0xe6e32000 0 0x8>; 924 #pwm-cells = <2>; 925 clocks = <&cpg CPG_MOD 523>; 926 resets = <&cpg 523>; |
902 power-domains = <&sysc 32>; | 927 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
903 status = "disabled"; 904 }; 905 906 pwm3: pwm@e6e33000 { 907 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 908 reg = <0 0xe6e33000 0 0x8>; 909 #pwm-cells = <2>; 910 clocks = <&cpg CPG_MOD 523>; 911 resets = <&cpg 523>; | 928 status = "disabled"; 929 }; 930 931 pwm3: pwm@e6e33000 { 932 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 933 reg = <0 0xe6e33000 0 0x8>; 934 #pwm-cells = <2>; 935 clocks = <&cpg CPG_MOD 523>; 936 resets = <&cpg 523>; |
912 power-domains = <&sysc 32>; | 937 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
913 status = "disabled"; 914 }; 915 916 pwm4: pwm@e6e34000 { 917 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 918 reg = <0 0xe6e34000 0 0x8>; 919 #pwm-cells = <2>; 920 clocks = <&cpg CPG_MOD 523>; 921 resets = <&cpg 523>; | 938 status = "disabled"; 939 }; 940 941 pwm4: pwm@e6e34000 { 942 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 943 reg = <0 0xe6e34000 0 0x8>; 944 #pwm-cells = <2>; 945 clocks = <&cpg CPG_MOD 523>; 946 resets = <&cpg 523>; |
922 power-domains = <&sysc 32>; | 947 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
923 status = "disabled"; 924 }; 925 926 pwm5: pwm@e6e35000 { 927 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 928 reg = <0 0xe6e35000 0 0x8>; 929 #pwm-cells = <2>; 930 clocks = <&cpg CPG_MOD 523>; 931 resets = <&cpg 523>; | 948 status = "disabled"; 949 }; 950 951 pwm5: pwm@e6e35000 { 952 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 953 reg = <0 0xe6e35000 0 0x8>; 954 #pwm-cells = <2>; 955 clocks = <&cpg CPG_MOD 523>; 956 resets = <&cpg 523>; |
932 power-domains = <&sysc 32>; | 957 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
933 status = "disabled"; 934 }; 935 936 pwm6: pwm@e6e36000 { 937 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 938 reg = <0 0xe6e36000 0 0x8>; 939 #pwm-cells = <2>; 940 clocks = <&cpg CPG_MOD 523>; 941 resets = <&cpg 523>; | 958 status = "disabled"; 959 }; 960 961 pwm6: pwm@e6e36000 { 962 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; 963 reg = <0 0xe6e36000 0 0x8>; 964 #pwm-cells = <2>; 965 clocks = <&cpg CPG_MOD 523>; 966 resets = <&cpg 523>; |
942 power-domains = <&sysc 32>; | 967 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
943 status = "disabled"; 944 }; 945 946 scif0: serial@e6e60000 { 947 compatible = "renesas,scif-r8a774a1", 948 "renesas,rcar-gen3-scif", "renesas,scif"; 949 reg = <0 0xe6e60000 0 0x40>; 950 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 951 clocks = <&cpg CPG_MOD 207>, 952 <&cpg CPG_CORE 19>, 953 <&scif_clk>; 954 clock-names = "fck", "brg_int", "scif_clk"; 955 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 956 <&dmac2 0x51>, <&dmac2 0x50>; 957 dma-names = "tx", "rx", "tx", "rx"; | 968 status = "disabled"; 969 }; 970 971 scif0: serial@e6e60000 { 972 compatible = "renesas,scif-r8a774a1", 973 "renesas,rcar-gen3-scif", "renesas,scif"; 974 reg = <0 0xe6e60000 0 0x40>; 975 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 976 clocks = <&cpg CPG_MOD 207>, 977 <&cpg CPG_CORE 19>, 978 <&scif_clk>; 979 clock-names = "fck", "brg_int", "scif_clk"; 980 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 981 <&dmac2 0x51>, <&dmac2 0x50>; 982 dma-names = "tx", "rx", "tx", "rx"; |
958 power-domains = <&sysc 32>; | 983 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
959 resets = <&cpg 207>; 960 status = "disabled"; 961 }; 962 963 scif1: serial@e6e68000 { 964 compatible = "renesas,scif-r8a774a1", 965 "renesas,rcar-gen3-scif", "renesas,scif"; 966 reg = <0 0xe6e68000 0 0x40>; 967 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 968 clocks = <&cpg CPG_MOD 206>, 969 <&cpg CPG_CORE 19>, 970 <&scif_clk>; 971 clock-names = "fck", "brg_int", "scif_clk"; 972 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 973 <&dmac2 0x53>, <&dmac2 0x52>; 974 dma-names = "tx", "rx", "tx", "rx"; | 984 resets = <&cpg 207>; 985 status = "disabled"; 986 }; 987 988 scif1: serial@e6e68000 { 989 compatible = "renesas,scif-r8a774a1", 990 "renesas,rcar-gen3-scif", "renesas,scif"; 991 reg = <0 0xe6e68000 0 0x40>; 992 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 993 clocks = <&cpg CPG_MOD 206>, 994 <&cpg CPG_CORE 19>, 995 <&scif_clk>; 996 clock-names = "fck", "brg_int", "scif_clk"; 997 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 998 <&dmac2 0x53>, <&dmac2 0x52>; 999 dma-names = "tx", "rx", "tx", "rx"; |
975 power-domains = <&sysc 32>; | 1000 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
976 resets = <&cpg 206>; 977 status = "disabled"; 978 }; 979 980 scif2: serial@e6e88000 { 981 compatible = "renesas,scif-r8a774a1", 982 "renesas,rcar-gen3-scif", "renesas,scif"; 983 reg = <0 0xe6e88000 0 0x40>; 984 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 985 clocks = <&cpg CPG_MOD 310>, 986 <&cpg CPG_CORE 19>, 987 <&scif_clk>; 988 clock-names = "fck", "brg_int", "scif_clk"; | 1001 resets = <&cpg 206>; 1002 status = "disabled"; 1003 }; 1004 1005 scif2: serial@e6e88000 { 1006 compatible = "renesas,scif-r8a774a1", 1007 "renesas,rcar-gen3-scif", "renesas,scif"; 1008 reg = <0 0xe6e88000 0 0x40>; 1009 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1010 clocks = <&cpg CPG_MOD 310>, 1011 <&cpg CPG_CORE 19>, 1012 <&scif_clk>; 1013 clock-names = "fck", "brg_int", "scif_clk"; |
989 power-domains = <&sysc 32>; | 1014 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
990 resets = <&cpg 310>; 991 status = "disabled"; 992 }; 993 994 scif3: serial@e6c50000 { 995 compatible = "renesas,scif-r8a774a1", 996 "renesas,rcar-gen3-scif", "renesas,scif"; 997 reg = <0 0xe6c50000 0 0x40>; 998 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 999 clocks = <&cpg CPG_MOD 204>, 1000 <&cpg CPG_CORE 19>, 1001 <&scif_clk>; 1002 clock-names = "fck", "brg_int", "scif_clk"; 1003 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1004 dma-names = "tx", "rx"; | 1015 resets = <&cpg 310>; 1016 status = "disabled"; 1017 }; 1018 1019 scif3: serial@e6c50000 { 1020 compatible = "renesas,scif-r8a774a1", 1021 "renesas,rcar-gen3-scif", "renesas,scif"; 1022 reg = <0 0xe6c50000 0 0x40>; 1023 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1024 clocks = <&cpg CPG_MOD 204>, 1025 <&cpg CPG_CORE 19>, 1026 <&scif_clk>; 1027 clock-names = "fck", "brg_int", "scif_clk"; 1028 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1029 dma-names = "tx", "rx"; |
1005 power-domains = <&sysc 32>; | 1030 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1006 resets = <&cpg 204>; 1007 status = "disabled"; 1008 }; 1009 1010 scif4: serial@e6c40000 { 1011 compatible = "renesas,scif-r8a774a1", 1012 "renesas,rcar-gen3-scif", "renesas,scif"; 1013 reg = <0 0xe6c40000 0 0x40>; 1014 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1015 clocks = <&cpg CPG_MOD 203>, 1016 <&cpg CPG_CORE 19>, 1017 <&scif_clk>; 1018 clock-names = "fck", "brg_int", "scif_clk"; 1019 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1020 dma-names = "tx", "rx"; | 1031 resets = <&cpg 204>; 1032 status = "disabled"; 1033 }; 1034 1035 scif4: serial@e6c40000 { 1036 compatible = "renesas,scif-r8a774a1", 1037 "renesas,rcar-gen3-scif", "renesas,scif"; 1038 reg = <0 0xe6c40000 0 0x40>; 1039 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1040 clocks = <&cpg CPG_MOD 203>, 1041 <&cpg CPG_CORE 19>, 1042 <&scif_clk>; 1043 clock-names = "fck", "brg_int", "scif_clk"; 1044 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1045 dma-names = "tx", "rx"; |
1021 power-domains = <&sysc 32>; | 1046 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1022 resets = <&cpg 203>; 1023 status = "disabled"; 1024 }; 1025 1026 scif5: serial@e6f30000 { 1027 compatible = "renesas,scif-r8a774a1", 1028 "renesas,rcar-gen3-scif", "renesas,scif"; 1029 reg = <0 0xe6f30000 0 0x40>; 1030 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1031 clocks = <&cpg CPG_MOD 202>, 1032 <&cpg CPG_CORE 19>, 1033 <&scif_clk>; 1034 clock-names = "fck", "brg_int", "scif_clk"; 1035 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1036 <&dmac2 0x5b>, <&dmac2 0x5a>; 1037 dma-names = "tx", "rx", "tx", "rx"; | 1047 resets = <&cpg 203>; 1048 status = "disabled"; 1049 }; 1050 1051 scif5: serial@e6f30000 { 1052 compatible = "renesas,scif-r8a774a1", 1053 "renesas,rcar-gen3-scif", "renesas,scif"; 1054 reg = <0 0xe6f30000 0 0x40>; 1055 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1056 clocks = <&cpg CPG_MOD 202>, 1057 <&cpg CPG_CORE 19>, 1058 <&scif_clk>; 1059 clock-names = "fck", "brg_int", "scif_clk"; 1060 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1061 <&dmac2 0x5b>, <&dmac2 0x5a>; 1062 dma-names = "tx", "rx", "tx", "rx"; |
1038 power-domains = <&sysc 32>; | 1063 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1039 resets = <&cpg 202>; 1040 status = "disabled"; 1041 }; 1042 1043 msiof0: spi@e6e90000 { 1044 compatible = "renesas,msiof-r8a774a1", 1045 "renesas,rcar-gen3-msiof"; 1046 reg = <0 0xe6e90000 0 0x0064>; 1047 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1048 clocks = <&cpg CPG_MOD 211>; 1049 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1050 <&dmac2 0x41>, <&dmac2 0x40>; 1051 dma-names = "tx", "rx", "tx", "rx"; | 1064 resets = <&cpg 202>; 1065 status = "disabled"; 1066 }; 1067 1068 msiof0: spi@e6e90000 { 1069 compatible = "renesas,msiof-r8a774a1", 1070 "renesas,rcar-gen3-msiof"; 1071 reg = <0 0xe6e90000 0 0x0064>; 1072 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1073 clocks = <&cpg CPG_MOD 211>; 1074 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1075 <&dmac2 0x41>, <&dmac2 0x40>; 1076 dma-names = "tx", "rx", "tx", "rx"; |
1052 power-domains = <&sysc 32>; | 1077 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1053 resets = <&cpg 211>; 1054 #address-cells = <1>; 1055 #size-cells = <0>; 1056 status = "disabled"; 1057 }; 1058 1059 msiof1: spi@e6ea0000 { 1060 compatible = "renesas,msiof-r8a774a1", 1061 "renesas,rcar-gen3-msiof"; 1062 reg = <0 0xe6ea0000 0 0x0064>; 1063 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1064 clocks = <&cpg CPG_MOD 210>; 1065 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1066 <&dmac2 0x43>, <&dmac2 0x42>; 1067 dma-names = "tx", "rx", "tx", "rx"; | 1078 resets = <&cpg 211>; 1079 #address-cells = <1>; 1080 #size-cells = <0>; 1081 status = "disabled"; 1082 }; 1083 1084 msiof1: spi@e6ea0000 { 1085 compatible = "renesas,msiof-r8a774a1", 1086 "renesas,rcar-gen3-msiof"; 1087 reg = <0 0xe6ea0000 0 0x0064>; 1088 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1089 clocks = <&cpg CPG_MOD 210>; 1090 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1091 <&dmac2 0x43>, <&dmac2 0x42>; 1092 dma-names = "tx", "rx", "tx", "rx"; |
1068 power-domains = <&sysc 32>; | 1093 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1069 resets = <&cpg 210>; 1070 #address-cells = <1>; 1071 #size-cells = <0>; 1072 status = "disabled"; 1073 }; 1074 1075 msiof2: spi@e6c00000 { 1076 compatible = "renesas,msiof-r8a774a1", 1077 "renesas,rcar-gen3-msiof"; 1078 reg = <0 0xe6c00000 0 0x0064>; 1079 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1080 clocks = <&cpg CPG_MOD 209>; 1081 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1082 dma-names = "tx", "rx"; | 1094 resets = <&cpg 210>; 1095 #address-cells = <1>; 1096 #size-cells = <0>; 1097 status = "disabled"; 1098 }; 1099 1100 msiof2: spi@e6c00000 { 1101 compatible = "renesas,msiof-r8a774a1", 1102 "renesas,rcar-gen3-msiof"; 1103 reg = <0 0xe6c00000 0 0x0064>; 1104 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1105 clocks = <&cpg CPG_MOD 209>; 1106 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1107 dma-names = "tx", "rx"; |
1083 power-domains = <&sysc 32>; | 1108 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1084 resets = <&cpg 209>; 1085 #address-cells = <1>; 1086 #size-cells = <0>; 1087 status = "disabled"; 1088 }; 1089 1090 msiof3: spi@e6c10000 { 1091 compatible = "renesas,msiof-r8a774a1", 1092 "renesas,rcar-gen3-msiof"; 1093 reg = <0 0xe6c10000 0 0x0064>; 1094 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1095 clocks = <&cpg CPG_MOD 208>; 1096 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1097 dma-names = "tx", "rx"; | 1109 resets = <&cpg 209>; 1110 #address-cells = <1>; 1111 #size-cells = <0>; 1112 status = "disabled"; 1113 }; 1114 1115 msiof3: spi@e6c10000 { 1116 compatible = "renesas,msiof-r8a774a1", 1117 "renesas,rcar-gen3-msiof"; 1118 reg = <0 0xe6c10000 0 0x0064>; 1119 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1120 clocks = <&cpg CPG_MOD 208>; 1121 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1122 dma-names = "tx", "rx"; |
1098 power-domains = <&sysc 32>; | 1123 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1099 resets = <&cpg 208>; 1100 #address-cells = <1>; 1101 #size-cells = <0>; 1102 status = "disabled"; 1103 }; 1104 | 1124 resets = <&cpg 208>; 1125 #address-cells = <1>; 1126 #size-cells = <0>; 1127 status = "disabled"; 1128 }; 1129 |
1130 vin0: video@e6ef0000 { 1131 compatible = "renesas,vin-r8a774a1"; 1132 reg = <0 0xe6ef0000 0 0x1000>; 1133 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1134 clocks = <&cpg CPG_MOD 811>; 1135 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; 1136 resets = <&cpg 811>; 1137 renesas,id = <0>; 1138 status = "disabled"; 1139 1140 ports { 1141 #address-cells = <1>; 1142 #size-cells = <0>; 1143 1144 port@1 { 1145 #address-cells = <1>; 1146 #size-cells = <0>; 1147 1148 reg = <1>; 1149 1150 vin0csi20: endpoint@0 { 1151 reg = <0>; 1152 remote-endpoint = <&csi20vin0>; 1153 }; 1154 vin0csi40: endpoint@2 { 1155 reg = <2>; 1156 remote-endpoint = <&csi40vin0>; 1157 }; 1158 }; 1159 }; 1160 }; 1161 1162 vin1: video@e6ef1000 { 1163 compatible = "renesas,vin-r8a774a1"; 1164 reg = <0 0xe6ef1000 0 0x1000>; 1165 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1166 clocks = <&cpg CPG_MOD 810>; 1167 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; 1168 resets = <&cpg 810>; 1169 renesas,id = <1>; 1170 status = "disabled"; 1171 1172 ports { 1173 #address-cells = <1>; 1174 #size-cells = <0>; 1175 1176 port@1 { 1177 #address-cells = <1>; 1178 #size-cells = <0>; 1179 1180 reg = <1>; 1181 1182 vin1csi20: endpoint@0 { 1183 reg = <0>; 1184 remote-endpoint = <&csi20vin1>; 1185 }; 1186 vin1csi40: endpoint@2 { 1187 reg = <2>; 1188 remote-endpoint = <&csi40vin1>; 1189 }; 1190 }; 1191 }; 1192 }; 1193 1194 vin2: video@e6ef2000 { 1195 compatible = "renesas,vin-r8a774a1"; 1196 reg = <0 0xe6ef2000 0 0x1000>; 1197 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1198 clocks = <&cpg CPG_MOD 809>; 1199 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; 1200 resets = <&cpg 809>; 1201 renesas,id = <2>; 1202 status = "disabled"; 1203 1204 ports { 1205 #address-cells = <1>; 1206 #size-cells = <0>; 1207 1208 port@1 { 1209 #address-cells = <1>; 1210 #size-cells = <0>; 1211 1212 reg = <1>; 1213 1214 vin2csi20: endpoint@0 { 1215 reg = <0>; 1216 remote-endpoint = <&csi20vin2>; 1217 }; 1218 vin2csi40: endpoint@2 { 1219 reg = <2>; 1220 remote-endpoint = <&csi40vin2>; 1221 }; 1222 }; 1223 }; 1224 }; 1225 1226 vin3: video@e6ef3000 { 1227 compatible = "renesas,vin-r8a774a1"; 1228 reg = <0 0xe6ef3000 0 0x1000>; 1229 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1230 clocks = <&cpg CPG_MOD 808>; 1231 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; 1232 resets = <&cpg 808>; 1233 renesas,id = <3>; 1234 status = "disabled"; 1235 1236 ports { 1237 #address-cells = <1>; 1238 #size-cells = <0>; 1239 1240 port@1 { 1241 #address-cells = <1>; 1242 #size-cells = <0>; 1243 1244 reg = <1>; 1245 1246 vin3csi20: endpoint@0 { 1247 reg = <0>; 1248 remote-endpoint = <&csi20vin3>; 1249 }; 1250 vin3csi40: endpoint@2 { 1251 reg = <2>; 1252 remote-endpoint = <&csi40vin3>; 1253 }; 1254 }; 1255 }; 1256 }; 1257 1258 vin4: video@e6ef4000 { 1259 compatible = "renesas,vin-r8a774a1"; 1260 reg = <0 0xe6ef4000 0 0x1000>; 1261 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1262 clocks = <&cpg CPG_MOD 807>; 1263 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; 1264 resets = <&cpg 807>; 1265 renesas,id = <4>; 1266 status = "disabled"; 1267 1268 ports { 1269 #address-cells = <1>; 1270 #size-cells = <0>; 1271 1272 port@1 { 1273 #address-cells = <1>; 1274 #size-cells = <0>; 1275 1276 reg = <1>; 1277 1278 vin4csi20: endpoint@0 { 1279 reg = <0>; 1280 remote-endpoint = <&csi20vin4>; 1281 }; 1282 vin4csi40: endpoint@2 { 1283 reg = <2>; 1284 remote-endpoint = <&csi40vin4>; 1285 }; 1286 }; 1287 }; 1288 }; 1289 1290 vin5: video@e6ef5000 { 1291 compatible = "renesas,vin-r8a774a1"; 1292 reg = <0 0xe6ef5000 0 0x1000>; 1293 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1294 clocks = <&cpg CPG_MOD 806>; 1295 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; 1296 resets = <&cpg 806>; 1297 renesas,id = <5>; 1298 status = "disabled"; 1299 1300 ports { 1301 #address-cells = <1>; 1302 #size-cells = <0>; 1303 1304 port@1 { 1305 #address-cells = <1>; 1306 #size-cells = <0>; 1307 1308 reg = <1>; 1309 1310 vin5csi20: endpoint@0 { 1311 reg = <0>; 1312 remote-endpoint = <&csi20vin5>; 1313 }; 1314 vin5csi40: endpoint@2 { 1315 reg = <2>; 1316 remote-endpoint = <&csi40vin5>; 1317 }; 1318 }; 1319 }; 1320 }; 1321 1322 vin6: video@e6ef6000 { 1323 compatible = "renesas,vin-r8a774a1"; 1324 reg = <0 0xe6ef6000 0 0x1000>; 1325 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1326 clocks = <&cpg CPG_MOD 805>; 1327 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; 1328 resets = <&cpg 805>; 1329 renesas,id = <6>; 1330 status = "disabled"; 1331 1332 ports { 1333 #address-cells = <1>; 1334 #size-cells = <0>; 1335 1336 port@1 { 1337 #address-cells = <1>; 1338 #size-cells = <0>; 1339 1340 reg = <1>; 1341 1342 vin6csi20: endpoint@0 { 1343 reg = <0>; 1344 remote-endpoint = <&csi20vin6>; 1345 }; 1346 vin6csi40: endpoint@2 { 1347 reg = <2>; 1348 remote-endpoint = <&csi40vin6>; 1349 }; 1350 }; 1351 }; 1352 }; 1353 1354 vin7: video@e6ef7000 { 1355 compatible = "renesas,vin-r8a774a1"; 1356 reg = <0 0xe6ef7000 0 0x1000>; 1357 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1358 clocks = <&cpg CPG_MOD 804>; 1359 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; 1360 resets = <&cpg 804>; 1361 renesas,id = <7>; 1362 status = "disabled"; 1363 1364 ports { 1365 #address-cells = <1>; 1366 #size-cells = <0>; 1367 1368 port@1 { 1369 #address-cells = <1>; 1370 #size-cells = <0>; 1371 1372 reg = <1>; 1373 1374 vin7csi20: endpoint@0 { 1375 reg = <0>; 1376 remote-endpoint = <&csi20vin7>; 1377 }; 1378 vin7csi40: endpoint@2 { 1379 reg = <2>; 1380 remote-endpoint = <&csi40vin7>; 1381 }; 1382 }; 1383 }; 1384 }; 1385 |
|
1105 rcar_sound: sound@ec500000 { 1106 /* 1107 * #sound-dai-cells is required 1108 * 1109 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1110 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1111 */ 1112 /* --- 33 unchanged lines hidden (view full) --- 1146 "ssi.1", "ssi.0", 1147 "src.9", "src.8", "src.7", "src.6", 1148 "src.5", "src.4", "src.3", "src.2", 1149 "src.1", "src.0", 1150 "mix.1", "mix.0", 1151 "ctu.1", "ctu.0", 1152 "dvc.0", "dvc.1", 1153 "clk_a", "clk_b", "clk_c", "clk_i"; | 1386 rcar_sound: sound@ec500000 { 1387 /* 1388 * #sound-dai-cells is required 1389 * 1390 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1391 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1392 */ 1393 /* --- 33 unchanged lines hidden (view full) --- 1427 "ssi.1", "ssi.0", 1428 "src.9", "src.8", "src.7", "src.6", 1429 "src.5", "src.4", "src.3", "src.2", 1430 "src.1", "src.0", 1431 "mix.1", "mix.0", 1432 "ctu.1", "ctu.0", 1433 "dvc.0", "dvc.1", 1434 "clk_a", "clk_b", "clk_c", "clk_i"; |
1154 power-domains = <&sysc 32>; | 1435 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1155 resets = <&cpg 1005>, 1156 <&cpg 1006>, <&cpg 1007>, 1157 <&cpg 1008>, <&cpg 1009>, 1158 <&cpg 1010>, <&cpg 1011>, 1159 <&cpg 1012>, <&cpg 1013>, 1160 <&cpg 1014>, <&cpg 1015>; 1161 reset-names = "ssi-all", 1162 "ssi.9", "ssi.8", "ssi.7", "ssi.6", --- 169 unchanged lines hidden (view full) --- 1332 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1333 interrupt-names = "error", 1334 "ch0", "ch1", "ch2", "ch3", 1335 "ch4", "ch5", "ch6", "ch7", 1336 "ch8", "ch9", "ch10", "ch11", 1337 "ch12", "ch13", "ch14", "ch15"; 1338 clocks = <&cpg CPG_MOD 502>; 1339 clock-names = "fck"; | 1436 resets = <&cpg 1005>, 1437 <&cpg 1006>, <&cpg 1007>, 1438 <&cpg 1008>, <&cpg 1009>, 1439 <&cpg 1010>, <&cpg 1011>, 1440 <&cpg 1012>, <&cpg 1013>, 1441 <&cpg 1014>, <&cpg 1015>; 1442 reset-names = "ssi-all", 1443 "ssi.9", "ssi.8", "ssi.7", "ssi.6", --- 169 unchanged lines hidden (view full) --- 1613 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1614 interrupt-names = "error", 1615 "ch0", "ch1", "ch2", "ch3", 1616 "ch4", "ch5", "ch6", "ch7", 1617 "ch8", "ch9", "ch10", "ch11", 1618 "ch12", "ch13", "ch14", "ch15"; 1619 clocks = <&cpg CPG_MOD 502>; 1620 clock-names = "fck"; |
1340 power-domains = <&sysc 32>; | 1621 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1341 resets = <&cpg 502>; 1342 #dma-cells = <1>; 1343 dma-channels = <16>; 1344 }; 1345 1346 audma1: dma-controller@ec720000 { 1347 compatible = "renesas,dmac-r8a774a1", 1348 "renesas,rcar-dmac"; --- 17 unchanged lines hidden (view full) --- 1366 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 1367 interrupt-names = "error", 1368 "ch0", "ch1", "ch2", "ch3", 1369 "ch4", "ch5", "ch6", "ch7", 1370 "ch8", "ch9", "ch10", "ch11", 1371 "ch12", "ch13", "ch14", "ch15"; 1372 clocks = <&cpg CPG_MOD 501>; 1373 clock-names = "fck"; | 1622 resets = <&cpg 502>; 1623 #dma-cells = <1>; 1624 dma-channels = <16>; 1625 }; 1626 1627 audma1: dma-controller@ec720000 { 1628 compatible = "renesas,dmac-r8a774a1", 1629 "renesas,rcar-dmac"; --- 17 unchanged lines hidden (view full) --- 1647 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 1648 interrupt-names = "error", 1649 "ch0", "ch1", "ch2", "ch3", 1650 "ch4", "ch5", "ch6", "ch7", 1651 "ch8", "ch9", "ch10", "ch11", 1652 "ch12", "ch13", "ch14", "ch15"; 1653 clocks = <&cpg CPG_MOD 501>; 1654 clock-names = "fck"; |
1374 power-domains = <&sysc 32>; | 1655 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1375 resets = <&cpg 501>; 1376 #dma-cells = <1>; 1377 dma-channels = <16>; 1378 }; 1379 1380 xhci0: usb@ee000000 { 1381 compatible = "renesas,xhci-r8a774a1", 1382 "renesas,rcar-gen3-xhci"; 1383 reg = <0 0xee000000 0 0xc00>; 1384 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1385 clocks = <&cpg CPG_MOD 328>; | 1656 resets = <&cpg 501>; 1657 #dma-cells = <1>; 1658 dma-channels = <16>; 1659 }; 1660 1661 xhci0: usb@ee000000 { 1662 compatible = "renesas,xhci-r8a774a1", 1663 "renesas,rcar-gen3-xhci"; 1664 reg = <0 0xee000000 0 0xc00>; 1665 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1666 clocks = <&cpg CPG_MOD 328>; |
1386 power-domains = <&sysc 32>; | 1667 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1387 resets = <&cpg 328>; 1388 status = "disabled"; 1389 }; 1390 1391 usb3_peri0: usb@ee020000 { 1392 compatible = "renesas,r8a774a1-usb3-peri", 1393 "renesas,rcar-gen3-usb3-peri"; 1394 reg = <0 0xee020000 0 0x400>; 1395 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1396 clocks = <&cpg CPG_MOD 328>; | 1668 resets = <&cpg 328>; 1669 status = "disabled"; 1670 }; 1671 1672 usb3_peri0: usb@ee020000 { 1673 compatible = "renesas,r8a774a1-usb3-peri", 1674 "renesas,rcar-gen3-usb3-peri"; 1675 reg = <0 0xee020000 0 0x400>; 1676 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1677 clocks = <&cpg CPG_MOD 328>; |
1397 power-domains = <&sysc 32>; | 1678 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1398 resets = <&cpg 328>; 1399 status = "disabled"; 1400 }; 1401 1402 ohci0: usb@ee080000 { 1403 compatible = "generic-ohci"; 1404 reg = <0 0xee080000 0 0x100>; 1405 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1406 clocks = <&cpg CPG_MOD 703>; 1407 phys = <&usb2_phy0>; 1408 phy-names = "usb"; | 1679 resets = <&cpg 328>; 1680 status = "disabled"; 1681 }; 1682 1683 ohci0: usb@ee080000 { 1684 compatible = "generic-ohci"; 1685 reg = <0 0xee080000 0 0x100>; 1686 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1687 clocks = <&cpg CPG_MOD 703>; 1688 phys = <&usb2_phy0>; 1689 phy-names = "usb"; |
1409 power-domains = <&sysc 32>; | 1690 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1410 resets = <&cpg 703>; 1411 status = "disabled"; 1412 }; 1413 1414 ohci1: usb@ee0a0000 { 1415 compatible = "generic-ohci"; 1416 reg = <0 0xee0a0000 0 0x100>; 1417 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1418 clocks = <&cpg CPG_MOD 702>; 1419 phys = <&usb2_phy1>; 1420 phy-names = "usb"; | 1691 resets = <&cpg 703>; 1692 status = "disabled"; 1693 }; 1694 1695 ohci1: usb@ee0a0000 { 1696 compatible = "generic-ohci"; 1697 reg = <0 0xee0a0000 0 0x100>; 1698 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1699 clocks = <&cpg CPG_MOD 702>; 1700 phys = <&usb2_phy1>; 1701 phy-names = "usb"; |
1421 power-domains = <&sysc 32>; | 1702 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1422 resets = <&cpg 702>; 1423 status = "disabled"; 1424 }; 1425 1426 ehci0: usb@ee080100 { 1427 compatible = "generic-ehci"; 1428 reg = <0 0xee080100 0 0x100>; 1429 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1430 clocks = <&cpg CPG_MOD 703>; 1431 phys = <&usb2_phy0>; 1432 phy-names = "usb"; 1433 companion = <&ohci0>; | 1703 resets = <&cpg 702>; 1704 status = "disabled"; 1705 }; 1706 1707 ehci0: usb@ee080100 { 1708 compatible = "generic-ehci"; 1709 reg = <0 0xee080100 0 0x100>; 1710 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1711 clocks = <&cpg CPG_MOD 703>; 1712 phys = <&usb2_phy0>; 1713 phy-names = "usb"; 1714 companion = <&ohci0>; |
1434 power-domains = <&sysc 32>; | 1715 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1435 resets = <&cpg 703>; 1436 status = "disabled"; 1437 }; 1438 1439 ehci1: usb@ee0a0100 { 1440 compatible = "generic-ehci"; 1441 reg = <0 0xee0a0100 0 0x100>; 1442 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1443 clocks = <&cpg CPG_MOD 702>; 1444 phys = <&usb2_phy1>; 1445 phy-names = "usb"; 1446 companion = <&ohci1>; | 1716 resets = <&cpg 703>; 1717 status = "disabled"; 1718 }; 1719 1720 ehci1: usb@ee0a0100 { 1721 compatible = "generic-ehci"; 1722 reg = <0 0xee0a0100 0 0x100>; 1723 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1724 clocks = <&cpg CPG_MOD 702>; 1725 phys = <&usb2_phy1>; 1726 phy-names = "usb"; 1727 companion = <&ohci1>; |
1447 power-domains = <&sysc 32>; | 1728 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1448 resets = <&cpg 702>; 1449 status = "disabled"; 1450 }; 1451 1452 usb2_phy0: usb-phy@ee080200 { 1453 compatible = "renesas,usb2-phy-r8a774a1", 1454 "renesas,rcar-gen3-usb2-phy"; 1455 reg = <0 0xee080200 0 0x700>; 1456 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1457 clocks = <&cpg CPG_MOD 703>; | 1729 resets = <&cpg 702>; 1730 status = "disabled"; 1731 }; 1732 1733 usb2_phy0: usb-phy@ee080200 { 1734 compatible = "renesas,usb2-phy-r8a774a1", 1735 "renesas,rcar-gen3-usb2-phy"; 1736 reg = <0 0xee080200 0 0x700>; 1737 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1738 clocks = <&cpg CPG_MOD 703>; |
1458 power-domains = <&sysc 32>; | 1739 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1459 resets = <&cpg 703>; 1460 #phy-cells = <0>; 1461 status = "disabled"; 1462 }; 1463 1464 usb2_phy1: usb-phy@ee0a0200 { 1465 compatible = "renesas,usb2-phy-r8a774a1", 1466 "renesas,rcar-gen3-usb2-phy"; 1467 reg = <0 0xee0a0200 0 0x700>; 1468 clocks = <&cpg CPG_MOD 702>; | 1740 resets = <&cpg 703>; 1741 #phy-cells = <0>; 1742 status = "disabled"; 1743 }; 1744 1745 usb2_phy1: usb-phy@ee0a0200 { 1746 compatible = "renesas,usb2-phy-r8a774a1", 1747 "renesas,rcar-gen3-usb2-phy"; 1748 reg = <0 0xee0a0200 0 0x700>; 1749 clocks = <&cpg CPG_MOD 702>; |
1469 power-domains = <&sysc 32>; | 1750 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1470 resets = <&cpg 702>; 1471 #phy-cells = <0>; 1472 status = "disabled"; 1473 }; 1474 1475 sdhi0: sd@ee100000 { 1476 compatible = "renesas,sdhi-r8a774a1", 1477 "renesas,rcar-gen3-sdhi"; 1478 reg = <0 0xee100000 0 0x2000>; 1479 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1480 clocks = <&cpg CPG_MOD 314>; 1481 max-frequency = <200000000>; | 1751 resets = <&cpg 702>; 1752 #phy-cells = <0>; 1753 status = "disabled"; 1754 }; 1755 1756 sdhi0: sd@ee100000 { 1757 compatible = "renesas,sdhi-r8a774a1", 1758 "renesas,rcar-gen3-sdhi"; 1759 reg = <0 0xee100000 0 0x2000>; 1760 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1761 clocks = <&cpg CPG_MOD 314>; 1762 max-frequency = <200000000>; |
1482 power-domains = <&sysc 32>; | 1763 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1483 resets = <&cpg 314>; 1484 status = "disabled"; 1485 }; 1486 1487 sdhi1: sd@ee120000 { 1488 compatible = "renesas,sdhi-r8a774a1", 1489 "renesas,rcar-gen3-sdhi"; 1490 reg = <0 0xee120000 0 0x2000>; 1491 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1492 clocks = <&cpg CPG_MOD 313>; 1493 max-frequency = <200000000>; | 1764 resets = <&cpg 314>; 1765 status = "disabled"; 1766 }; 1767 1768 sdhi1: sd@ee120000 { 1769 compatible = "renesas,sdhi-r8a774a1", 1770 "renesas,rcar-gen3-sdhi"; 1771 reg = <0 0xee120000 0 0x2000>; 1772 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1773 clocks = <&cpg CPG_MOD 313>; 1774 max-frequency = <200000000>; |
1494 power-domains = <&sysc 32>; | 1775 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1495 resets = <&cpg 313>; 1496 status = "disabled"; 1497 }; 1498 1499 sdhi2: sd@ee140000 { 1500 compatible = "renesas,sdhi-r8a774a1", 1501 "renesas,rcar-gen3-sdhi"; 1502 reg = <0 0xee140000 0 0x2000>; 1503 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1504 clocks = <&cpg CPG_MOD 312>; 1505 max-frequency = <200000000>; | 1776 resets = <&cpg 313>; 1777 status = "disabled"; 1778 }; 1779 1780 sdhi2: sd@ee140000 { 1781 compatible = "renesas,sdhi-r8a774a1", 1782 "renesas,rcar-gen3-sdhi"; 1783 reg = <0 0xee140000 0 0x2000>; 1784 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1785 clocks = <&cpg CPG_MOD 312>; 1786 max-frequency = <200000000>; |
1506 power-domains = <&sysc 32>; | 1787 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1507 resets = <&cpg 312>; 1508 status = "disabled"; 1509 }; 1510 1511 sdhi3: sd@ee160000 { 1512 compatible = "renesas,sdhi-r8a774a1", 1513 "renesas,rcar-gen3-sdhi"; 1514 reg = <0 0xee160000 0 0x2000>; 1515 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1516 clocks = <&cpg CPG_MOD 311>; 1517 max-frequency = <200000000>; | 1788 resets = <&cpg 312>; 1789 status = "disabled"; 1790 }; 1791 1792 sdhi3: sd@ee160000 { 1793 compatible = "renesas,sdhi-r8a774a1", 1794 "renesas,rcar-gen3-sdhi"; 1795 reg = <0 0xee160000 0 0x2000>; 1796 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1797 clocks = <&cpg CPG_MOD 311>; 1798 max-frequency = <200000000>; |
1518 power-domains = <&sysc 32>; | 1799 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1519 resets = <&cpg 311>; 1520 status = "disabled"; 1521 }; 1522 1523 gic: interrupt-controller@f1010000 { 1524 compatible = "arm,gic-400"; 1525 #interrupt-cells = <3>; 1526 #address-cells = <0>; 1527 interrupt-controller; 1528 reg = <0x0 0xf1010000 0 0x1000>, 1529 <0x0 0xf1020000 0 0x20000>, 1530 <0x0 0xf1040000 0 0x20000>, 1531 <0x0 0xf1060000 0 0x20000>; 1532 interrupts = <GIC_PPI 9 1533 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 1534 clocks = <&cpg CPG_MOD 408>; 1535 clock-names = "clk"; | 1800 resets = <&cpg 311>; 1801 status = "disabled"; 1802 }; 1803 1804 gic: interrupt-controller@f1010000 { 1805 compatible = "arm,gic-400"; 1806 #interrupt-cells = <3>; 1807 #address-cells = <0>; 1808 interrupt-controller; 1809 reg = <0x0 0xf1010000 0 0x1000>, 1810 <0x0 0xf1020000 0 0x20000>, 1811 <0x0 0xf1040000 0 0x20000>, 1812 <0x0 0xf1060000 0 0x20000>; 1813 interrupts = <GIC_PPI 9 1814 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 1815 clocks = <&cpg CPG_MOD 408>; 1816 clock-names = "clk"; |
1536 power-domains = <&sysc 32>; | 1817 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1537 resets = <&cpg 408>; 1538 }; 1539 1540 fcpf0: fcp@fe950000 { 1541 compatible = "renesas,fcpf"; 1542 reg = <0 0xfe950000 0 0x200>; 1543 clocks = <&cpg CPG_MOD 615>; | 1818 resets = <&cpg 408>; 1819 }; 1820 1821 fcpf0: fcp@fe950000 { 1822 compatible = "renesas,fcpf"; 1823 reg = <0 0xfe950000 0 0x200>; 1824 clocks = <&cpg CPG_MOD 615>; |
1544 power-domains = <&sysc 14>; | 1825 power-domains = <&sysc R8A774A1_PD_A3VC>; |
1545 resets = <&cpg 615>; 1546 }; 1547 1548 fcpvb0: fcp@fe96f000 { 1549 compatible = "renesas,fcpv"; 1550 reg = <0 0xfe96f000 0 0x200>; 1551 clocks = <&cpg CPG_MOD 607>; | 1826 resets = <&cpg 615>; 1827 }; 1828 1829 fcpvb0: fcp@fe96f000 { 1830 compatible = "renesas,fcpv"; 1831 reg = <0 0xfe96f000 0 0x200>; 1832 clocks = <&cpg CPG_MOD 607>; |
1552 power-domains = <&sysc 14>; | 1833 power-domains = <&sysc R8A774A1_PD_A3VC>; |
1553 resets = <&cpg 607>; 1554 }; 1555 1556 fcpvd0: fcp@fea27000 { 1557 compatible = "renesas,fcpv"; 1558 reg = <0 0xfea27000 0 0x200>; 1559 clocks = <&cpg CPG_MOD 603>; | 1834 resets = <&cpg 607>; 1835 }; 1836 1837 fcpvd0: fcp@fea27000 { 1838 compatible = "renesas,fcpv"; 1839 reg = <0 0xfea27000 0 0x200>; 1840 clocks = <&cpg CPG_MOD 603>; |
1560 power-domains = <&sysc 32>; | 1841 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1561 resets = <&cpg 603>; 1562 iommus = <&ipmmu_vi0 8>; 1563 }; 1564 1565 fcpvd1: fcp@fea2f000 { 1566 compatible = "renesas,fcpv"; 1567 reg = <0 0xfea2f000 0 0x200>; 1568 clocks = <&cpg CPG_MOD 602>; | 1842 resets = <&cpg 603>; 1843 iommus = <&ipmmu_vi0 8>; 1844 }; 1845 1846 fcpvd1: fcp@fea2f000 { 1847 compatible = "renesas,fcpv"; 1848 reg = <0 0xfea2f000 0 0x200>; 1849 clocks = <&cpg CPG_MOD 602>; |
1569 power-domains = <&sysc 32>; | 1850 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1570 resets = <&cpg 602>; 1571 iommus = <&ipmmu_vi0 9>; 1572 }; 1573 1574 fcpvd2: fcp@fea37000 { 1575 compatible = "renesas,fcpv"; 1576 reg = <0 0xfea37000 0 0x200>; 1577 clocks = <&cpg CPG_MOD 601>; | 1851 resets = <&cpg 602>; 1852 iommus = <&ipmmu_vi0 9>; 1853 }; 1854 1855 fcpvd2: fcp@fea37000 { 1856 compatible = "renesas,fcpv"; 1857 reg = <0 0xfea37000 0 0x200>; 1858 clocks = <&cpg CPG_MOD 601>; |
1578 power-domains = <&sysc 32>; | 1859 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; |
1579 resets = <&cpg 601>; 1580 iommus = <&ipmmu_vi0 10>; 1581 }; 1582 1583 fcpvi0: fcp@fe9af000 { 1584 compatible = "renesas,fcpv"; 1585 reg = <0 0xfe9af000 0 0x200>; 1586 clocks = <&cpg CPG_MOD 611>; | 1860 resets = <&cpg 601>; 1861 iommus = <&ipmmu_vi0 10>; 1862 }; 1863 1864 fcpvi0: fcp@fe9af000 { 1865 compatible = "renesas,fcpv"; 1866 reg = <0 0xfe9af000 0 0x200>; 1867 clocks = <&cpg CPG_MOD 611>; |
1587 power-domains = <&sysc 14>; | 1868 power-domains = <&sysc R8A774A1_PD_A3VC>; |
1588 resets = <&cpg 611>; 1589 iommus = <&ipmmu_vc0 19>; 1590 }; 1591 | 1869 resets = <&cpg 611>; 1870 iommus = <&ipmmu_vc0 19>; 1871 }; 1872 |
1873 csi20: csi2@fea80000 { 1874 compatible = "renesas,r8a774a1-csi2"; 1875 reg = <0 0xfea80000 0 0x10000>; 1876 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 1877 clocks = <&cpg CPG_MOD 714>; 1878 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; 1879 resets = <&cpg 714>; 1880 status = "disabled"; 1881 1882 ports { 1883 #address-cells = <1>; 1884 #size-cells = <0>; 1885 1886 port@1 { 1887 #address-cells = <1>; 1888 #size-cells = <0>; 1889 1890 reg = <1>; 1891 1892 csi20vin0: endpoint@0 { 1893 reg = <0>; 1894 remote-endpoint = <&vin0csi20>; 1895 }; 1896 csi20vin1: endpoint@1 { 1897 reg = <1>; 1898 remote-endpoint = <&vin1csi20>; 1899 }; 1900 csi20vin2: endpoint@2 { 1901 reg = <2>; 1902 remote-endpoint = <&vin2csi20>; 1903 }; 1904 csi20vin3: endpoint@3 { 1905 reg = <3>; 1906 remote-endpoint = <&vin3csi20>; 1907 }; 1908 csi20vin4: endpoint@4 { 1909 reg = <4>; 1910 remote-endpoint = <&vin4csi20>; 1911 }; 1912 csi20vin5: endpoint@5 { 1913 reg = <5>; 1914 remote-endpoint = <&vin5csi20>; 1915 }; 1916 csi20vin6: endpoint@6 { 1917 reg = <6>; 1918 remote-endpoint = <&vin6csi20>; 1919 }; 1920 csi20vin7: endpoint@7 { 1921 reg = <7>; 1922 remote-endpoint = <&vin7csi20>; 1923 }; 1924 }; 1925 }; 1926 }; 1927 1928 csi40: csi2@feaa0000 { 1929 compatible = "renesas,r8a774a1-csi2"; 1930 reg = <0 0xfeaa0000 0 0x10000>; 1931 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1932 clocks = <&cpg CPG_MOD 716>; 1933 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; 1934 resets = <&cpg 716>; 1935 status = "disabled"; 1936 1937 ports { 1938 #address-cells = <1>; 1939 #size-cells = <0>; 1940 1941 port@1 { 1942 #address-cells = <1>; 1943 #size-cells = <0>; 1944 1945 reg = <1>; 1946 1947 csi40vin0: endpoint@0 { 1948 reg = <0>; 1949 remote-endpoint = <&vin0csi40>; 1950 }; 1951 csi40vin1: endpoint@1 { 1952 reg = <1>; 1953 remote-endpoint = <&vin1csi40>; 1954 }; 1955 csi40vin2: endpoint@2 { 1956 reg = <2>; 1957 remote-endpoint = <&vin2csi40>; 1958 }; 1959 csi40vin3: endpoint@3 { 1960 reg = <3>; 1961 remote-endpoint = <&vin3csi40>; 1962 }; 1963 csi40vin4: endpoint@4 { 1964 reg = <4>; 1965 remote-endpoint = <&vin4csi40>; 1966 }; 1967 csi40vin5: endpoint@5 { 1968 reg = <5>; 1969 remote-endpoint = <&vin5csi40>; 1970 }; 1971 csi40vin6: endpoint@6 { 1972 reg = <6>; 1973 remote-endpoint = <&vin6csi40>; 1974 }; 1975 csi40vin7: endpoint@7 { 1976 reg = <7>; 1977 remote-endpoint = <&vin7csi40>; 1978 }; 1979 }; 1980 1981 }; 1982 }; 1983 |
|
1592 prr: chipid@fff00044 { 1593 compatible = "renesas,prr"; 1594 reg = <0 0xfff00044 0 4>; 1595 }; 1596 }; 1597 1598 thermal-zones { 1599 sensor_thermal1: sensor-thermal1 { --- 64 unchanged lines hidden --- | 1984 prr: chipid@fff00044 { 1985 compatible = "renesas,prr"; 1986 reg = <0 0xfff00044 0 4>; 1987 }; 1988 }; 1989 1990 thermal-zones { 1991 sensor_thermal1: sensor-thermal1 { --- 64 unchanged lines hidden --- |