sm8250.dtsi (42ac0be18bfa09c03f52244f7c3e15c89b38532f) sm8250.dtsi (6bf150aef236fbb6d9fd299081fa8f1f0f6fde6f)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
4 */
5
6#include <dt-bindings/interrupt-controller/arm-gic.h>
7#include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8#include <dt-bindings/clock/qcom,gcc-sm8250.h>

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4123 "sleep",
4124 "mock_utmi",
4125 "xo";
4126
4127 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
4128 <&gcc GCC_USB30_PRIM_MASTER_CLK>;
4129 assigned-clock-rates = <19200000>, <200000000>;
4130
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
4 */
5
6#include <dt-bindings/interrupt-controller/arm-gic.h>
7#include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8#include <dt-bindings/clock/qcom,gcc-sm8250.h>

--- 4114 unchanged lines hidden (view full) ---

4123 "sleep",
4124 "mock_utmi",
4125 "xo";
4126
4127 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
4128 <&gcc GCC_USB30_PRIM_MASTER_CLK>;
4129 assigned-clock-rates = <19200000>, <200000000>;
4130
4131 interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
4132 <&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
4131 interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
4132 <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
4133 <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
4133 <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
4134 <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
4134 <&pdc 14 IRQ_TYPE_EDGE_BOTH>;
4135 interrupt-names = "hs_phy_irq",
4136 "ss_phy_irq",
4135 <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
4136 interrupt-names = "pwr_event",
4137 "hs_phy_irq",
4138 "dp_hs_phy_irq",
4137 "dm_hs_phy_irq",
4139 "dm_hs_phy_irq",
4138 "dp_hs_phy_irq";
4140 "ss_phy_irq";
4139
4140 power-domains = <&gcc USB30_PRIM_GDSC>;
4141 wakeup-source;
4142
4143 resets = <&gcc GCC_USB30_PRIM_BCR>;
4144
4145 interconnects = <&aggre1_noc MASTER_USB3 0 &mc_virt SLAVE_EBI_CH0 0>,
4146 <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>;

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4192 "sleep",
4193 "mock_utmi",
4194 "xo";
4195
4196 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
4197 <&gcc GCC_USB30_SEC_MASTER_CLK>;
4198 assigned-clock-rates = <19200000>, <200000000>;
4199
4141
4142 power-domains = <&gcc USB30_PRIM_GDSC>;
4143 wakeup-source;
4144
4145 resets = <&gcc GCC_USB30_PRIM_BCR>;
4146
4147 interconnects = <&aggre1_noc MASTER_USB3 0 &mc_virt SLAVE_EBI_CH0 0>,
4148 <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>;

--- 45 unchanged lines hidden (view full) ---

4194 "sleep",
4195 "mock_utmi",
4196 "xo";
4197
4198 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
4199 <&gcc GCC_USB30_SEC_MASTER_CLK>;
4200 assigned-clock-rates = <19200000>, <200000000>;
4201
4200 interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
4201 <&pdc 16 IRQ_TYPE_LEVEL_HIGH>,
4202 interrupts-extended = <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
4203 <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
4204 <&pdc 12 IRQ_TYPE_EDGE_BOTH>,
4202 <&pdc 13 IRQ_TYPE_EDGE_BOTH>,
4205 <&pdc 13 IRQ_TYPE_EDGE_BOTH>,
4203 <&pdc 12 IRQ_TYPE_EDGE_BOTH>;
4204 interrupt-names = "hs_phy_irq",
4205 "ss_phy_irq",
4206 <&pdc 16 IRQ_TYPE_LEVEL_HIGH>;
4207 interrupt-names = "pwr_event",
4208 "hs_phy_irq",
4209 "dp_hs_phy_irq",
4206 "dm_hs_phy_irq",
4210 "dm_hs_phy_irq",
4207 "dp_hs_phy_irq";
4211 "ss_phy_irq";
4208
4209 power-domains = <&gcc USB30_SEC_GDSC>;
4210 wakeup-source;
4211
4212 resets = <&gcc GCC_USB30_SEC_BCR>;
4213
4214 interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>,
4215 <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>;

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4213 power-domains = <&gcc USB30_SEC_GDSC>;
4214 wakeup-source;
4215
4216 resets = <&gcc GCC_USB30_SEC_BCR>;
4217
4218 interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>,
4219 <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>;

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