| sm6375.dtsi (42ac0be18bfa09c03f52244f7c3e15c89b38532f) | sm6375.dtsi (6bf150aef236fbb6d9fd299081fa8f1f0f6fde6f) |
|---|---|
| 1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2022, Konrad Dybcio <konrad.dybcio@somainline.org> 4 */ 5 6#include <dt-bindings/clock/qcom,rpmcc.h> 7#include <dt-bindings/clock/qcom,sm6375-gcc.h> 8#include <dt-bindings/clock/qcom,sm6375-gpucc.h> --- 1417 unchanged lines hidden (view full) --- 1426 "mock_utmi", 1427 "xo"; 1428 1429 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 1430 <&gcc GCC_USB30_PRIM_MASTER_CLK>; 1431 assigned-clock-rates = <19200000>, <133333333>; 1432 1433 interrupts-extended = <&intc GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, | 1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2022, Konrad Dybcio <konrad.dybcio@somainline.org> 4 */ 5 6#include <dt-bindings/clock/qcom,rpmcc.h> 7#include <dt-bindings/clock/qcom,sm6375-gcc.h> 8#include <dt-bindings/clock/qcom,sm6375-gpucc.h> --- 1417 unchanged lines hidden (view full) --- 1426 "mock_utmi", 1427 "xo"; 1428 1429 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 1430 <&gcc GCC_USB30_PRIM_MASTER_CLK>; 1431 assigned-clock-rates = <19200000>, <133333333>; 1432 1433 interrupts-extended = <&intc GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, |
| 1434 <&mpm 12 IRQ_TYPE_LEVEL_HIGH>, | 1434 <&intc GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, 1435 <&mpm 94 IRQ_TYPE_EDGE_BOTH>, |
| 1435 <&mpm 93 IRQ_TYPE_EDGE_BOTH>, | 1436 <&mpm 93 IRQ_TYPE_EDGE_BOTH>, |
| 1436 <&mpm 94 IRQ_TYPE_EDGE_BOTH>; 1437 interrupt-names = "hs_phy_irq", 1438 "ss_phy_irq", | 1437 <&mpm 12 IRQ_TYPE_LEVEL_HIGH>; 1438 interrupt-names = "pwr_event", 1439 "hs_phy_irq", 1440 "dp_hs_phy_irq", |
| 1439 "dm_hs_phy_irq", | 1441 "dm_hs_phy_irq", |
| 1440 "dp_hs_phy_irq"; | 1442 "ss_phy_irq"; |
| 1441 1442 power-domains = <&gcc USB30_PRIM_GDSC>; 1443 1444 resets = <&gcc GCC_USB30_PRIM_BCR>; 1445 1446 /* 1447 * This property is there to allow USB2 to work, as 1448 * USB3 is not implemented yet - (re)move it when --- 1099 unchanged lines hidden --- | 1443 1444 power-domains = <&gcc USB30_PRIM_GDSC>; 1445 1446 resets = <&gcc GCC_USB30_PRIM_BCR>; 1447 1448 /* 1449 * This property is there to allow USB2 to work, as 1450 * USB3 is not implemented yet - (re)move it when --- 1099 unchanged lines hidden --- |