sc7180.dtsi (3b02a051d25d9600e9d403ad3043aed7de00160e) sc7180.dtsi (f97d414d7fee8c3de0a6f4788f77b65f82b9a693)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * SC7180 SoC device tree source
4 *
5 * Copyright (c) 2019, The Linux Foundation. All rights reserved.
6 */
7
8#include <dt-bindings/clock/qcom,dispcc-sc7180.h>

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86 };
87
88 cpus {
89 #address-cells = <2>;
90 #size-cells = <0>;
91
92 CPU0: cpu@0 {
93 device_type = "cpu";
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * SC7180 SoC device tree source
4 *
5 * Copyright (c) 2019, The Linux Foundation. All rights reserved.
6 */
7
8#include <dt-bindings/clock/qcom,dispcc-sc7180.h>

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86 };
87
88 cpus {
89 #address-cells = <2>;
90 #size-cells = <0>;
91
92 CPU0: cpu@0 {
93 device_type = "cpu";
94 compatible = "arm,armv8";
94 compatible = "qcom,kryo468";
95 reg = <0x0 0x0>;
96 enable-method = "psci";
97 capacity-dmips-mhz = <1024>;
98 dynamic-power-coefficient = <100>;
99 next-level-cache = <&L2_0>;
100 #cooling-cells = <2>;
101 qcom,freq-domain = <&cpufreq_hw 0>;
102 L2_0: l2-cache {
103 compatible = "cache";
104 next-level-cache = <&L3_0>;
105 L3_0: l3-cache {
106 compatible = "cache";
107 };
108 };
109 };
110
111 CPU1: cpu@100 {
112 device_type = "cpu";
95 reg = <0x0 0x0>;
96 enable-method = "psci";
97 capacity-dmips-mhz = <1024>;
98 dynamic-power-coefficient = <100>;
99 next-level-cache = <&L2_0>;
100 #cooling-cells = <2>;
101 qcom,freq-domain = <&cpufreq_hw 0>;
102 L2_0: l2-cache {
103 compatible = "cache";
104 next-level-cache = <&L3_0>;
105 L3_0: l3-cache {
106 compatible = "cache";
107 };
108 };
109 };
110
111 CPU1: cpu@100 {
112 device_type = "cpu";
113 compatible = "arm,armv8";
113 compatible = "qcom,kryo468";
114 reg = <0x0 0x100>;
115 enable-method = "psci";
116 capacity-dmips-mhz = <1024>;
117 dynamic-power-coefficient = <100>;
118 next-level-cache = <&L2_100>;
119 #cooling-cells = <2>;
120 qcom,freq-domain = <&cpufreq_hw 0>;
121 L2_100: l2-cache {
122 compatible = "cache";
123 next-level-cache = <&L3_0>;
124 };
125 };
126
127 CPU2: cpu@200 {
128 device_type = "cpu";
114 reg = <0x0 0x100>;
115 enable-method = "psci";
116 capacity-dmips-mhz = <1024>;
117 dynamic-power-coefficient = <100>;
118 next-level-cache = <&L2_100>;
119 #cooling-cells = <2>;
120 qcom,freq-domain = <&cpufreq_hw 0>;
121 L2_100: l2-cache {
122 compatible = "cache";
123 next-level-cache = <&L3_0>;
124 };
125 };
126
127 CPU2: cpu@200 {
128 device_type = "cpu";
129 compatible = "arm,armv8";
129 compatible = "qcom,kryo468";
130 reg = <0x0 0x200>;
131 enable-method = "psci";
132 capacity-dmips-mhz = <1024>;
133 dynamic-power-coefficient = <100>;
134 next-level-cache = <&L2_200>;
135 #cooling-cells = <2>;
136 qcom,freq-domain = <&cpufreq_hw 0>;
137 L2_200: l2-cache {
138 compatible = "cache";
139 next-level-cache = <&L3_0>;
140 };
141 };
142
143 CPU3: cpu@300 {
144 device_type = "cpu";
130 reg = <0x0 0x200>;
131 enable-method = "psci";
132 capacity-dmips-mhz = <1024>;
133 dynamic-power-coefficient = <100>;
134 next-level-cache = <&L2_200>;
135 #cooling-cells = <2>;
136 qcom,freq-domain = <&cpufreq_hw 0>;
137 L2_200: l2-cache {
138 compatible = "cache";
139 next-level-cache = <&L3_0>;
140 };
141 };
142
143 CPU3: cpu@300 {
144 device_type = "cpu";
145 compatible = "arm,armv8";
145 compatible = "qcom,kryo468";
146 reg = <0x0 0x300>;
147 enable-method = "psci";
148 capacity-dmips-mhz = <1024>;
149 dynamic-power-coefficient = <100>;
150 next-level-cache = <&L2_300>;
151 #cooling-cells = <2>;
152 qcom,freq-domain = <&cpufreq_hw 0>;
153 L2_300: l2-cache {
154 compatible = "cache";
155 next-level-cache = <&L3_0>;
156 };
157 };
158
159 CPU4: cpu@400 {
160 device_type = "cpu";
146 reg = <0x0 0x300>;
147 enable-method = "psci";
148 capacity-dmips-mhz = <1024>;
149 dynamic-power-coefficient = <100>;
150 next-level-cache = <&L2_300>;
151 #cooling-cells = <2>;
152 qcom,freq-domain = <&cpufreq_hw 0>;
153 L2_300: l2-cache {
154 compatible = "cache";
155 next-level-cache = <&L3_0>;
156 };
157 };
158
159 CPU4: cpu@400 {
160 device_type = "cpu";
161 compatible = "arm,armv8";
161 compatible = "qcom,kryo468";
162 reg = <0x0 0x400>;
163 enable-method = "psci";
164 capacity-dmips-mhz = <1024>;
165 dynamic-power-coefficient = <100>;
166 next-level-cache = <&L2_400>;
167 #cooling-cells = <2>;
168 qcom,freq-domain = <&cpufreq_hw 0>;
169 L2_400: l2-cache {
170 compatible = "cache";
171 next-level-cache = <&L3_0>;
172 };
173 };
174
175 CPU5: cpu@500 {
176 device_type = "cpu";
162 reg = <0x0 0x400>;
163 enable-method = "psci";
164 capacity-dmips-mhz = <1024>;
165 dynamic-power-coefficient = <100>;
166 next-level-cache = <&L2_400>;
167 #cooling-cells = <2>;
168 qcom,freq-domain = <&cpufreq_hw 0>;
169 L2_400: l2-cache {
170 compatible = "cache";
171 next-level-cache = <&L3_0>;
172 };
173 };
174
175 CPU5: cpu@500 {
176 device_type = "cpu";
177 compatible = "arm,armv8";
177 compatible = "qcom,kryo468";
178 reg = <0x0 0x500>;
179 enable-method = "psci";
180 capacity-dmips-mhz = <1024>;
181 dynamic-power-coefficient = <100>;
182 next-level-cache = <&L2_500>;
183 #cooling-cells = <2>;
184 qcom,freq-domain = <&cpufreq_hw 0>;
185 L2_500: l2-cache {
186 compatible = "cache";
187 next-level-cache = <&L3_0>;
188 };
189 };
190
191 CPU6: cpu@600 {
192 device_type = "cpu";
178 reg = <0x0 0x500>;
179 enable-method = "psci";
180 capacity-dmips-mhz = <1024>;
181 dynamic-power-coefficient = <100>;
182 next-level-cache = <&L2_500>;
183 #cooling-cells = <2>;
184 qcom,freq-domain = <&cpufreq_hw 0>;
185 L2_500: l2-cache {
186 compatible = "cache";
187 next-level-cache = <&L3_0>;
188 };
189 };
190
191 CPU6: cpu@600 {
192 device_type = "cpu";
193 compatible = "arm,armv8";
193 compatible = "qcom,kryo468";
194 reg = <0x0 0x600>;
195 enable-method = "psci";
196 capacity-dmips-mhz = <1740>;
197 dynamic-power-coefficient = <405>;
198 next-level-cache = <&L2_600>;
199 #cooling-cells = <2>;
200 qcom,freq-domain = <&cpufreq_hw 1>;
201 L2_600: l2-cache {
202 compatible = "cache";
203 next-level-cache = <&L3_0>;
204 };
205 };
206
207 CPU7: cpu@700 {
208 device_type = "cpu";
194 reg = <0x0 0x600>;
195 enable-method = "psci";
196 capacity-dmips-mhz = <1740>;
197 dynamic-power-coefficient = <405>;
198 next-level-cache = <&L2_600>;
199 #cooling-cells = <2>;
200 qcom,freq-domain = <&cpufreq_hw 1>;
201 L2_600: l2-cache {
202 compatible = "cache";
203 next-level-cache = <&L3_0>;
204 };
205 };
206
207 CPU7: cpu@700 {
208 device_type = "cpu";
209 compatible = "arm,armv8";
209 compatible = "qcom,kryo468";
210 reg = <0x0 0x700>;
211 enable-method = "psci";
212 capacity-dmips-mhz = <1740>;
213 dynamic-power-coefficient = <405>;
214 next-level-cache = <&L2_700>;
215 #cooling-cells = <2>;
216 qcom,freq-domain = <&cpufreq_hw 1>;
217 L2_700: l2-cache {

--- 2565 unchanged lines hidden --- 		210 reg = <0x0 0x700>;
211 enable-method = "psci";
212 capacity-dmips-mhz = <1740>;
213 dynamic-power-coefficient = <405>;
214 next-level-cache = <&L2_700>;
215 #cooling-cells = <2>;
216 qcom,freq-domain = <&cpufreq_hw 1>;
217 L2_700: l2-cache {

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