sa8775p.dtsi (42ac0be18bfa09c03f52244f7c3e15c89b38532f) sa8775p.dtsi (6bf150aef236fbb6d9fd299081fa8f1f0f6fde6f)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2023, Linaro Limited
4 */
5
6#include <dt-bindings/interconnect/qcom,icc.h>
7#include <dt-bindings/interrupt-controller/arm-gic.h>
8#include <dt-bindings/clock/qcom,rpmh.h>

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1610 <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
1611 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
1612
1613 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
1614 <&gcc GCC_USB30_PRIM_MASTER_CLK>;
1615 assigned-clock-rates = <19200000>, <200000000>;
1616
1617 interrupts-extended = <&intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2023, Linaro Limited
4 */
5
6#include <dt-bindings/interconnect/qcom,icc.h>
7#include <dt-bindings/interrupt-controller/arm-gic.h>
8#include <dt-bindings/clock/qcom,rpmh.h>

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1610 <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
1611 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
1612
1613 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
1614 <&gcc GCC_USB30_PRIM_MASTER_CLK>;
1615 assigned-clock-rates = <19200000>, <200000000>;
1616
1617 interrupts-extended = <&intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
1618 <&intc GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
1618 <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
1619 <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
1620 <&pdc 12 IRQ_TYPE_LEVEL_HIGH>;
1621 interrupt-names = "pwr_event",
1619 <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
1620 <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
1621 <&pdc 12 IRQ_TYPE_LEVEL_HIGH>;
1622 interrupt-names = "pwr_event",
1623 "hs_phy_irq",
1622 "dp_hs_phy_irq",
1623 "dm_hs_phy_irq",
1624 "ss_phy_irq";
1625
1626 power-domains = <&gcc USB30_PRIM_GDSC>;
1627 required-opps = <&rpmhpd_opp_nom>;
1628
1629 resets = <&gcc GCC_USB30_PRIM_BCR>;

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1697 <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>;
1698 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
1699
1700 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
1701 <&gcc GCC_USB30_SEC_MASTER_CLK>;
1702 assigned-clock-rates = <19200000>, <200000000>;
1703
1704 interrupts-extended = <&intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
1624 "dp_hs_phy_irq",
1625 "dm_hs_phy_irq",
1626 "ss_phy_irq";
1627
1628 power-domains = <&gcc USB30_PRIM_GDSC>;
1629 required-opps = <&rpmhpd_opp_nom>;
1630
1631 resets = <&gcc GCC_USB30_PRIM_BCR>;

--- 67 unchanged lines hidden (view full) ---

1699 <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>;
1700 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
1701
1702 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
1703 <&gcc GCC_USB30_SEC_MASTER_CLK>;
1704 assigned-clock-rates = <19200000>, <200000000>;
1705
1706 interrupts-extended = <&intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
1707 <&intc GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
1705 <&pdc 8 IRQ_TYPE_EDGE_BOTH>,
1706 <&pdc 7 IRQ_TYPE_EDGE_BOTH>,
1707 <&pdc 13 IRQ_TYPE_LEVEL_HIGH>;
1708 interrupt-names = "pwr_event",
1708 <&pdc 8 IRQ_TYPE_EDGE_BOTH>,
1709 <&pdc 7 IRQ_TYPE_EDGE_BOTH>,
1710 <&pdc 13 IRQ_TYPE_LEVEL_HIGH>;
1711 interrupt-names = "pwr_event",
1712 "hs_phy_irq",
1709 "dp_hs_phy_irq",
1710 "dm_hs_phy_irq",
1711 "ss_phy_irq";
1712
1713 power-domains = <&gcc USB30_SEC_GDSC>;
1714 required-opps = <&rpmhpd_opp_nom>;
1715
1716 resets = <&gcc GCC_USB30_SEC_BCR>;

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1760 <&gcc GCC_USB20_MOCK_UTMI_CLK>;
1761 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
1762
1763 assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
1764 <&gcc GCC_USB20_MASTER_CLK>;
1765 assigned-clock-rates = <19200000>, <200000000>;
1766
1767 interrupts-extended = <&intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
1713 "dp_hs_phy_irq",
1714 "dm_hs_phy_irq",
1715 "ss_phy_irq";
1716
1717 power-domains = <&gcc USB30_SEC_GDSC>;
1718 required-opps = <&rpmhpd_opp_nom>;
1719
1720 resets = <&gcc GCC_USB30_SEC_BCR>;

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1764 <&gcc GCC_USB20_MOCK_UTMI_CLK>;
1765 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
1766
1767 assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
1768 <&gcc GCC_USB20_MASTER_CLK>;
1769 assigned-clock-rates = <19200000>, <200000000>;
1770
1771 interrupts-extended = <&intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
1772 <&intc GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>,
1768 <&pdc 10 IRQ_TYPE_EDGE_BOTH>,
1769 <&pdc 9 IRQ_TYPE_EDGE_BOTH>;
1770 interrupt-names = "pwr_event",
1773 <&pdc 10 IRQ_TYPE_EDGE_BOTH>,
1774 <&pdc 9 IRQ_TYPE_EDGE_BOTH>;
1775 interrupt-names = "pwr_event",
1776 "hs_phy_irq",
1771 "dp_hs_phy_irq",
1772 "dm_hs_phy_irq";
1773
1774 power-domains = <&gcc USB20_PRIM_GDSC>;
1775 required-opps = <&rpmhpd_opp_nom>;
1776
1777 resets = <&gcc GCC_USB20_PRIM_BCR>;
1778

--- 1939 unchanged lines hidden --- 		1777 "dp_hs_phy_irq",
1778 "dm_hs_phy_irq";
1779
1780 power-domains = <&gcc USB20_PRIM_GDSC>;
1781 required-opps = <&rpmhpd_opp_nom>;
1782
1783 resets = <&gcc GCC_USB20_PRIM_BCR>;
1784

--- 1939 unchanged lines hidden ---