qcm2290.dtsi (bb131bf411c8bec1557997aebd50c44886aadf36) qcm2290.dtsi (8b40a46966d294bc64bad0feb13d3304fde738f2)
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (c) 2023, Linaro Ltd
4 *
5 * Based on sm6115.dtsi and previous efforts by Shawn Guo & Loic Poulain.
6 */
7
8#include <dt-bindings/clock/qcom,dispcc-qcm2290.h>

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160
161 memory@40000000 {
162 device_type = "memory";
163 /* We expect the bootloader to fill in the size */
164 reg = <0 0x40000000 0 0>;
165 };
166
167 pmu {
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (c) 2023, Linaro Ltd
4 *
5 * Based on sm6115.dtsi and previous efforts by Shawn Guo & Loic Poulain.
6 */
7
8#include <dt-bindings/clock/qcom,dispcc-qcm2290.h>

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160
161 memory@40000000 {
162 device_type = "memory";
163 /* We expect the bootloader to fill in the size */
164 reg = <0 0x40000000 0 0>;
165 };
166
167 pmu {
168 compatible = "arm,armv8-pmuv3";
168 compatible = "arm,cortex-a53-pmu";
169 interrupts = <GIC_PPI 6 IRQ_TYPE_LEVEL_HIGH>;
170 };
171
172 psci {
173 compatible = "arm,psci-1.0";
174 method = "smc";
175
176 CPU_PD0: power-domain-cpu0 {

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689 <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
690 reset-names = "phy",
691 "phy_phy";
692
693 #clock-cells = <0>;
694 clock-output-names = "usb3_phy_pipe_clk_src";
695
696 #phy-cells = <0>;
169 interrupts = <GIC_PPI 6 IRQ_TYPE_LEVEL_HIGH>;
170 };
171
172 psci {
173 compatible = "arm,psci-1.0";
174 method = "smc";
175
176 CPU_PD0: power-domain-cpu0 {

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689 <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
690 reset-names = "phy",
691 "phy_phy";
692
693 #clock-cells = <0>;
694 clock-output-names = "usb3_phy_pipe_clk_src";
695
696 #phy-cells = <0>;
697 orientation-switch;
698
699 qcom,tcsr-reg = <&tcsr_regs 0xb244>;
700
701 status = "disabled";
697
698 qcom,tcsr-reg = <&tcsr_regs 0xb244>;
699
700 status = "disabled";
702
703 ports {
704 #address-cells = <1>;
705 #size-cells = <0>;
706
707 port@0 {
708 reg = <0>;
709
710 usb_qmpphy_out: endpoint {
711 };
712 };
713
714 port@1 {
715 reg = <1>;
716
717 usb_qmpphy_usb_ss_in: endpoint {
718 remote-endpoint = <&usb_dwc3_ss>;
719 };
720 };
721 };
722 };
723
724 system_noc: interconnect@1880000 {
725 compatible = "qcom,qcm2290-snoc";
726 reg = <0x0 0x01880000 0x0 0x60200>;
727 #interconnect-cells = <2>;
728
729 qup_virt: interconnect-qup {

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1396 iommus = <&apps_smmu 0x120 0x0>;
1397 snps,dis_u2_susphy_quirk;
1398 snps,dis_enblslpm_quirk;
1399 snps,has-lpm-erratum;
1400 snps,hird-threshold = /bits/ 8 <0x10>;
1401 snps,usb3_lpm_capable;
1402 maximum-speed = "super-speed";
1403 dr_mode = "otg";
701 };
702
703 system_noc: interconnect@1880000 {
704 compatible = "qcom,qcm2290-snoc";
705 reg = <0x0 0x01880000 0x0 0x60200>;
706 #interconnect-cells = <2>;
707
708 qup_virt: interconnect-qup {

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1375 iommus = <&apps_smmu 0x120 0x0>;
1376 snps,dis_u2_susphy_quirk;
1377 snps,dis_enblslpm_quirk;
1378 snps,has-lpm-erratum;
1379 snps,hird-threshold = /bits/ 8 <0x10>;
1380 snps,usb3_lpm_capable;
1381 maximum-speed = "super-speed";
1382 dr_mode = "otg";
1404 usb-role-switch;
1405
1406 ports {
1407 #address-cells = <1>;
1408 #size-cells = <0>;
1409
1410 port@0 {
1411 reg = <0>;
1412
1413 usb_dwc3_hs: endpoint {
1414 };
1415 };
1416
1417 port@1 {
1418 reg = <1>;
1419
1420 usb_dwc3_ss: endpoint {
1421 remote-endpoint = <&usb_qmpphy_usb_ss_in>;
1422 };
1423 };
1424 };
1425 };
1426 };
1427
1428 mdss: display-subsystem@5e00000 {
1429 compatible = "qcom,qcm2290-mdss";
1430 reg = <0x0 0x05e00000 0x0 0x1000>;
1431 reg-names = "mdss";
1432 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;

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1895 #redistributor-regions = <1>;
1896 redistributor-stride = <0x0 0x20000>;
1897 };
1898
1899 cpufreq_hw: cpufreq@f521000 {
1900 compatible = "qcom,qcm2290-cpufreq-hw", "qcom,cpufreq-hw";
1901 reg = <0x0 0x0f521000 0x0 0x1000>;
1902 reg-names = "freq-domain0";
1383 };
1384 };
1385
1386 mdss: display-subsystem@5e00000 {
1387 compatible = "qcom,qcm2290-mdss";
1388 reg = <0x0 0x05e00000 0x0 0x1000>;
1389 reg-names = "mdss";
1390 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;

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1853 #redistributor-regions = <1>;
1854 redistributor-stride = <0x0 0x20000>;
1855 };
1856
1857 cpufreq_hw: cpufreq@f521000 {
1858 compatible = "qcom,qcm2290-cpufreq-hw", "qcom,cpufreq-hw";
1859 reg = <0x0 0x0f521000 0x0 0x1000>;
1860 reg-names = "freq-domain0";
1903 interrupts-extended = <&lmh_cluster 0>;
1861 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1904 interrupt-names = "dcvsh-irq-0";
1905 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0>;
1906 clock-names = "xo", "alternate";
1907
1908 #freq-domain-cells = <1>;
1909 #clock-cells = <1>;
1910 };
1862 interrupt-names = "dcvsh-irq-0";
1863 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0>;
1864 clock-names = "xo", "alternate";
1865
1866 #freq-domain-cells = <1>;
1867 #clock-cells = <1>;
1868 };
1911
1912 lmh_cluster: lmh@f550800 {
1913 compatible = "qcom,qcm2290-lmh", "qcom,sm8150-lmh";
1914 reg = <0x0 0x0f550800 0x0 0x400>;
1915 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1916 cpus = <&CPU0>;
1917 qcom,lmh-temp-arm-millicelsius = <65000>;
1918 qcom,lmh-temp-low-millicelsius = <94500>;
1919 qcom,lmh-temp-high-millicelsius = <95000>;
1920 interrupt-controller;
1921 #interrupt-cells = <1>;
1922 };
1923 };
1924
1925 thermal-zones {
1926 mapss-thermal {
1927 polling-delay-passive = <0>;
1928 polling-delay = <0>;
1929
1930 thermal-sensors = <&tsens0 0>;

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1870
1871 thermal-zones {
1872 mapss-thermal {
1873 polling-delay-passive = <0>;
1874 polling-delay = <0>;
1875
1876 thermal-sensors = <&tsens0 0>;

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