tegra234.dtsi (79ed18d9ece474c15a2578e1cc5bfb4fce7a8eb7) tegra234.dtsi (6e505dd6804fc57411cbb878372f8cd03c806bd7)
1// SPDX-License-Identifier: GPL-2.0
2
3#include <dt-bindings/clock/tegra234-clock.h>
4#include <dt-bindings/gpio/tegra234-gpio.h>
5#include <dt-bindings/interrupt-controller/arm-gic.h>
6#include <dt-bindings/mailbox/tegra186-hsp.h>
7#include <dt-bindings/memory/tegra234-mc.h>
8#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>

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976 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_DISP>;
977 interconnects = <&mc TEGRA234_MEMORY_CLIENT_HDAR &emc>,
978 <&mc TEGRA234_MEMORY_CLIENT_HDAW &emc>;
979 interconnect-names = "dma-mem", "write";
980 iommus = <&smmu_niso0 TEGRA234_SID_HDA>;
981 status = "disabled";
982 };
983
1// SPDX-License-Identifier: GPL-2.0
2
3#include <dt-bindings/clock/tegra234-clock.h>
4#include <dt-bindings/gpio/tegra234-gpio.h>
5#include <dt-bindings/interrupt-controller/arm-gic.h>
6#include <dt-bindings/mailbox/tegra186-hsp.h>
7#include <dt-bindings/memory/tegra234-mc.h>
8#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>

--- 967 unchanged lines hidden (view full) ---

976 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_DISP>;
977 interconnects = <&mc TEGRA234_MEMORY_CLIENT_HDAR &emc>,
978 <&mc TEGRA234_MEMORY_CLIENT_HDAW &emc>;
979 interconnect-names = "dma-mem", "write";
980 iommus = <&smmu_niso0 TEGRA234_SID_HDA>;
981 status = "disabled";
982 };
983
984 xusb_padctl: padctl@3520000 {
985 compatible = "nvidia,tegra234-xusb-padctl";
986 reg = <0x0 0x03520000 0x0 0x20000>,
987 <0x0 0x03540000 0x0 0x10000>;
988 reg-names = "padctl", "ao";
989 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
990
991 resets = <&bpmp TEGRA234_RESET_XUSB_PADCTL>;
992 reset-names = "padctl";
993
994 status = "disabled";
995
996 pads {
997 usb2 {
998 clocks = <&bpmp TEGRA234_CLK_USB2_TRK>;
999 clock-names = "trk";
1000
1001 lanes {
1002 usb2-0 {
1003 nvidia,function = "xusb";
1004 status = "disabled";
1005 #phy-cells = <0>;
1006 };
1007
1008 usb2-1 {
1009 nvidia,function = "xusb";
1010 status = "disabled";
1011 #phy-cells = <0>;
1012 };
1013
1014 usb2-2 {
1015 nvidia,function = "xusb";
1016 status = "disabled";
1017 #phy-cells = <0>;
1018 };
1019
1020 usb2-3 {
1021 nvidia,function = "xusb";
1022 status = "disabled";
1023 #phy-cells = <0>;
1024 };
1025 };
1026 };
1027
1028 usb3 {
1029 lanes {
1030 usb3-0 {
1031 nvidia,function = "xusb";
1032 status = "disabled";
1033 #phy-cells = <0>;
1034 };
1035
1036 usb3-1 {
1037 nvidia,function = "xusb";
1038 status = "disabled";
1039 #phy-cells = <0>;
1040 };
1041
1042 usb3-2 {
1043 nvidia,function = "xusb";
1044 status = "disabled";
1045 #phy-cells = <0>;
1046 };
1047
1048 usb3-3 {
1049 nvidia,function = "xusb";
1050 status = "disabled";
1051 #phy-cells = <0>;
1052 };
1053 };
1054 };
1055 };
1056
1057 ports {
1058 usb2-0 {
1059 status = "disabled";
1060 };
1061
1062 usb2-1 {
1063 status = "disabled";
1064 };
1065
1066 usb2-2 {
1067 status = "disabled";
1068 };
1069
1070 usb2-3 {
1071 status = "disabled";
1072 };
1073
1074 usb3-0 {
1075 status = "disabled";
1076 };
1077
1078 usb3-1 {
1079 status = "disabled";
1080 };
1081
1082 usb3-2 {
1083 status = "disabled";
1084 };
1085
1086 usb3-3 {
1087 status = "disabled";
1088 };
1089 };
1090 };
1091
1092 usb@3610000 {
1093 compatible = "nvidia,tegra234-xusb";
1094 reg = <0x0 0x03610000 0x0 0x40000>,
1095 <0x0 0x03600000 0x0 0x10000>,
1096 <0x0 0x03650000 0x0 0x10000>;
1097 reg-names = "hcd", "fpci", "bar2";
1098
1099 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
1100 <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1101
1102 clocks = <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>,
1103 <&bpmp TEGRA234_CLK_XUSB_FALCON>,
1104 <&bpmp TEGRA234_CLK_XUSB_CORE_SS>,
1105 <&bpmp TEGRA234_CLK_XUSB_SS>,
1106 <&bpmp TEGRA234_CLK_CLK_M>,
1107 <&bpmp TEGRA234_CLK_XUSB_FS>,
1108 <&bpmp TEGRA234_CLK_UTMIP_PLL>,
1109 <&bpmp TEGRA234_CLK_CLK_M>,
1110 <&bpmp TEGRA234_CLK_PLLE>;
1111 clock-names = "xusb_host", "xusb_falcon_src",
1112 "xusb_ss", "xusb_ss_src", "xusb_hs_src",
1113 "xusb_fs_src", "pll_u_480m", "clk_m",
1114 "pll_e";
1115 interconnects = <&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTR &emc>,
1116 <&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTW &emc>;
1117 interconnect-names = "dma-mem", "write";
1118 iommus = <&smmu_niso1 TEGRA234_SID_XUSB_HOST>;
1119
1120 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_XUSBC>,
1121 <&bpmp TEGRA234_POWER_DOMAIN_XUSBA>;
1122 power-domain-names = "xusb_host", "xusb_ss";
1123
1124 nvidia,xusb-padctl = <&xusb_padctl>;
1125 dma-coherent;
1126 status = "disabled";
1127 };
1128
984 fuse@3810000 {
985 compatible = "nvidia,tegra234-efuse";
986 reg = <0x0 0x03810000 0x0 0x10000>;
987 clocks = <&bpmp TEGRA234_CLK_FUSE>;
988 clock-names = "fuse";
989 };
990
991 hsp_top0: hsp@3c00000 {

--- 2288 unchanged lines hidden --- 		1129 fuse@3810000 {
1130 compatible = "nvidia,tegra234-efuse";
1131 reg = <0x0 0x03810000 0x0 0x10000>;
1132 clocks = <&bpmp TEGRA234_CLK_FUSE>;
1133 clock-names = "fuse";
1134 };
1135
1136 hsp_top0: hsp@3c00000 {

--- 2288 unchanged lines hidden ---