hi6220.dtsi (9d066a252786e1a18484a6283f82614d42a9f4ac) hi6220.dtsi (339d00cb173a5eb283d3b8d617fa97a3a46ada2f)
1/*
2 * dts file for Hisilicon Hi6220 SoC
3 *
4 * Copyright (C) 2015, Hisilicon Ltd.
5 */
6
7#include <dt-bindings/interrupt-controller/arm-gic.h>
1/*
2 * dts file for Hisilicon Hi6220 SoC
3 *
4 * Copyright (C) 2015, Hisilicon Ltd.
5 */
6
7#include <dt-bindings/interrupt-controller/arm-gic.h>
8#include <dt-bindings/reset/hisi,hi6220-resets.h>
8#include <dt-bindings/clock/hi6220-clock.h>
9#include <dt-bindings/pinctrl/hisi.h>
10#include <dt-bindings/thermal/thermal.h>
11
12/ {
13 compatible = "hisilicon,hi6220";
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;

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247 #clock-cells = <1>;
248 #reset-cells = <1>;
249 };
250
251 media_ctrl: media_ctrl@f4410000 {
252 compatible = "hisilicon,hi6220-mediactrl", "syscon";
253 reg = <0x0 0xf4410000 0x0 0x1000>;
254 #clock-cells = <1>;
9#include <dt-bindings/clock/hi6220-clock.h>
10#include <dt-bindings/pinctrl/hisi.h>
11#include <dt-bindings/thermal/thermal.h>
12
13/ {
14 compatible = "hisilicon,hi6220";
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;

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248 #clock-cells = <1>;
249 #reset-cells = <1>;
250 };
251
252 media_ctrl: media_ctrl@f4410000 {
253 compatible = "hisilicon,hi6220-mediactrl", "syscon";
254 reg = <0x0 0xf4410000 0x0 0x1000>;
255 #clock-cells = <1>;
256 #reset-cells = <1>;
255 };
256
257 pm_ctrl: pm_ctrl@f7032000 {
258 compatible = "hisilicon,hi6220-pmctrl", "syscon";
259 reg = <0x0 0xf7032000 0x0 0x1000>;
260 #clock-cells = <1>;
261 };
262

--- 574 unchanged lines hidden --- 		257 };
258
259 pm_ctrl: pm_ctrl@f7032000 {
260 compatible = "hisilicon,hi6220-pmctrl", "syscon";
261 reg = <0x0 0xf7032000 0x0 0x1000>;
262 #clock-cells = <1>;
263 };
264

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