hi3670.dtsi (305656e0989d45e8dc7273e62130f3dc79d3e2de) hi3670.dtsi (b6e141eec86b730dfeddb888af7d3e0247530ef1)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * dts file for Hisilicon Hi3670 SoC
4 *
5 * Copyright (C) 2016, Hisilicon Ltd.
6 * Copyright (C) 2018, Linaro Ltd.
7 */
8

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709 <&crg_ctrl HI3670_HCLK_GATE_SDIO>;
710 clock-names = "ciu", "biu";
711 clock-frequency = <3200000>;
712 resets = <&crg_rst 0x94 20>;
713 reset-names = "reset";
714 card-detect-delay = <200>;
715 status = "disabled";
716 };
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * dts file for Hisilicon Hi3670 SoC
4 *
5 * Copyright (C) 2016, Hisilicon Ltd.
6 * Copyright (C) 2018, Linaro Ltd.
7 */
8

--- 700 unchanged lines hidden (view full) ---

709 <&crg_ctrl HI3670_HCLK_GATE_SDIO>;
710 clock-names = "ciu", "biu";
711 clock-frequency = <3200000>;
712 resets = <&crg_rst 0x94 20>;
713 reset-names = "reset";
714 card-detect-delay = <200>;
715 status = "disabled";
716 };
717
718 /* I2C */
719 i2c0: i2c@ffd71000 {
720 compatible = "snps,designware-i2c";
721 reg = <0x0 0xffd71000 0x0 0x1000>;
722 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
723 #address-cells = <1>;
724 #size-cells = <0>;
725 clock-frequency = <400000>;
726 clocks = <&iomcu HI3670_CLK_GATE_I2C0>;
727 resets = <&iomcu_rst 0x20 3>;
728 pinctrl-names = "default";
729 pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>;
730 status = "disabled";
731 };
732
733 i2c1: i2c@ffd72000 {
734 compatible = "snps,designware-i2c";
735 reg = <0x0 0xffd72000 0x0 0x1000>;
736 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
737 #address-cells = <1>;
738 #size-cells = <0>;
739 clock-frequency = <400000>;
740 clocks = <&iomcu HI3670_CLK_GATE_I2C1>;
741 resets = <&iomcu_rst 0x20 4>;
742 pinctrl-names = "default";
743 pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>;
744 status = "disabled";
745 };
746
747 i2c2: i2c@ffd73000 {
748 compatible = "snps,designware-i2c";
749 reg = <0x0 0xffd73000 0x0 0x1000>;
750 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
751 #address-cells = <1>;
752 #size-cells = <0>;
753 clock-frequency = <400000>;
754 clocks = <&iomcu HI3670_CLK_GATE_I2C2>;
755 resets = <&iomcu_rst 0x20 5>;
756 pinctrl-names = "default";
757 pinctrl-0 = <&i2c2_pmx_func &i2c2_cfg_func>;
758 status = "disabled";
759 };
760
761 i2c3: i2c@fdf0c000 {
762 compatible = "snps,designware-i2c";
763 reg = <0x0 0xfdf0c000 0x0 0x1000>;
764 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
765 #address-cells = <1>;
766 #size-cells = <0>;
767 clock-frequency = <400000>;
768 clocks = <&crg_ctrl HI3670_CLK_GATE_I2C3>;
769 resets = <&crg_rst 0x78 7>;
770 pinctrl-names = "default";
771 pinctrl-0 = <&i2c3_pmx_func &i2c3_cfg_func>;
772 status = "disabled";
773 };
774
775 i2c4: i2c@fdf0d000 {
776 compatible = "snps,designware-i2c";
777 reg = <0x0 0xfdf0d000 0x0 0x1000>;
778 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
779 #address-cells = <1>;
780 #size-cells = <0>;
781 clock-frequency = <400000>;
782 clocks = <&crg_ctrl HI3670_CLK_GATE_I2C4>;
783 resets = <&crg_rst 0x78 27>;
784 pinctrl-names = "default";
785 pinctrl-0 = <&i2c4_pmx_func &i2c4_cfg_func>;
786 status = "disabled";
787 };
717 };
718};
788 };
789};