imx8dxl.dtsi (e6d3431b6b5f1c12a2e08535e6db8020fa7dbd8c) imx8dxl.dtsi (8b40a46966d294bc64bad0feb13d3304fde738f2)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019~2020, 2022 NXP
4 */
5
6#include <dt-bindings/clock/imx8-clock.h>
7#include <dt-bindings/dma/fsl-edma.h>
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019~2020, 2022 NXP
4 */
5
6#include <dt-bindings/clock/imx8-clock.h>
7#include <dt-bindings/dma/fsl-edma.h>
8#include <dt-bindings/clock/imx8-lpcg.h>
9#include <dt-bindings/firmware/imx/rsrc.h>
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/interrupt-controller/arm-gic.h>
12#include <dt-bindings/input/input.h>
13#include <dt-bindings/pinctrl/pads-imx8dxl.h>
14#include <dt-bindings/thermal/thermal.h>
15
16/ {

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100
101 dsp_reserved: dsp@92400000 {
102 reg = <0 0x92400000 0 0x2000000>;
103 no-map;
104 };
105 };
106
107 pmu {
8#include <dt-bindings/firmware/imx/rsrc.h>
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/interrupt-controller/arm-gic.h>
11#include <dt-bindings/input/input.h>
12#include <dt-bindings/pinctrl/pads-imx8dxl.h>
13#include <dt-bindings/thermal/thermal.h>
14
15/ {

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99
100 dsp_reserved: dsp@92400000 {
101 reg = <0 0x92400000 0 0x2000000>;
102 no-map;
103 };
104 };
105
106 pmu {
108 compatible = "arm,armv8-pmuv3";
107 compatible = "arm,cortex-a35-pmu";
109 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
110 };
111
112 psci {
113 compatible = "arm,psci-1.0";
114 method = "smc";
115 };
116

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227 xtal24m: clock-xtal24m {
228 compatible = "fixed-clock";
229 #clock-cells = <0>;
230 clock-frequency = <24000000>;
231 clock-output-names = "xtal_24MHz";
232 };
233
234 /* sorted in register address */
108 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
109 };
110
111 psci {
112 compatible = "arm,psci-1.0";
113 method = "smc";
114 };
115

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226 xtal24m: clock-xtal24m {
227 compatible = "fixed-clock";
228 #clock-cells = <0>;
229 clock-frequency = <24000000>;
230 clock-output-names = "xtal_24MHz";
231 };
232
233 /* sorted in register address */
235 #include "imx8-ss-cm40.dtsi"
236 #include "imx8-ss-adma.dtsi"
237 #include "imx8-ss-conn.dtsi"
238 #include "imx8-ss-ddr.dtsi"
239 #include "imx8-ss-lsio.dtsi"
240};
241
242#include "imx8dxl-ss-adma.dtsi"
243#include "imx8dxl-ss-conn.dtsi"
244#include "imx8dxl-ss-lsio.dtsi"
245#include "imx8dxl-ss-ddr.dtsi"
234 #include "imx8-ss-adma.dtsi"
235 #include "imx8-ss-conn.dtsi"
236 #include "imx8-ss-ddr.dtsi"
237 #include "imx8-ss-lsio.dtsi"
238};
239
240#include "imx8dxl-ss-adma.dtsi"
241#include "imx8dxl-ss-conn.dtsi"
242#include "imx8dxl-ss-lsio.dtsi"
243#include "imx8dxl-ss-ddr.dtsi"
246
247&cm40_intmux {
248 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
249 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
250 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
251 <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
252 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
253 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
254 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
255 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
256};