exynos7885.dtsi (cdd5b5a9761fd66d17586e4f4ba6588c70e640ea) | exynos7885.dtsi (0ffc692ad83625358bf382c072f6c0af609ba157) |
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1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Samsung Exynos7885 SoC device tree source 4 * 5 * Copyright (c) 2021 Samsung Electronics Co., Ltd. 6 * Copyright (c) 2021 Dávid Virág 7 */ 8 --- 158 unchanged lines hidden (view full) --- 167 168 soc: soc@0 { 169 compatible = "simple-bus"; 170 #address-cells = <1>; 171 #size-cells = <1>; 172 ranges = <0x0 0x0 0x0 0x20000000>; 173 174 chipid@10000000 { | 1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Samsung Exynos7885 SoC device tree source 4 * 5 * Copyright (c) 2021 Samsung Electronics Co., Ltd. 6 * Copyright (c) 2021 Dávid Virág 7 */ 8 --- 158 unchanged lines hidden (view full) --- 167 168 soc: soc@0 { 169 compatible = "simple-bus"; 170 #address-cells = <1>; 171 #size-cells = <1>; 172 ranges = <0x0 0x0 0x0 0x20000000>; 173 174 chipid@10000000 { |
175 compatible = "samsung,exynos850-chipid"; | 175 compatible = "samsung,exynos7885-chipid", 176 "samsung,exynos850-chipid"; |
176 reg = <0x10000000 0x24>; 177 }; 178 179 gic: interrupt-controller@12301000 { 180 compatible = "arm,gic-400"; 181 #interrupt-cells = <3>; 182 #address-cells = <0>; 183 interrupt-controller; --- 75 unchanged lines hidden (view full) --- 259 "dout_fsys_usb30drd"; 260 }; 261 262 pinctrl_alive: pinctrl@11cb0000 { 263 compatible = "samsung,exynos7885-pinctrl"; 264 reg = <0x11cb0000 0x1000>; 265 266 wakeup-interrupt-controller { | 177 reg = <0x10000000 0x24>; 178 }; 179 180 gic: interrupt-controller@12301000 { 181 compatible = "arm,gic-400"; 182 #interrupt-cells = <3>; 183 #address-cells = <0>; 184 interrupt-controller; --- 75 unchanged lines hidden (view full) --- 260 "dout_fsys_usb30drd"; 261 }; 262 263 pinctrl_alive: pinctrl@11cb0000 { 264 compatible = "samsung,exynos7885-pinctrl"; 265 reg = <0x11cb0000 0x1000>; 266 267 wakeup-interrupt-controller { |
267 compatible = "samsung,exynos7-wakeup-eint"; | 268 compatible = "samsung,exynos7885-wakeup-eint", 269 "samsung,exynos7-wakeup-eint"; |
268 interrupt-parent = <&gic>; 269 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 270 }; 271 }; 272 273 pinctrl_fsys: pinctrl@13430000 { 274 compatible = "samsung,exynos7885-pinctrl"; 275 reg = <0x13430000 0x1000>; --- 8 unchanged lines hidden (view full) --- 284 285 pinctrl_dispaud: pinctrl@148f0000 { 286 compatible = "samsung,exynos7885-pinctrl"; 287 reg = <0x148f0000 0x1000>; 288 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 289 }; 290 291 pmu_system_controller: system-controller@11c80000 { | 270 interrupt-parent = <&gic>; 271 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 272 }; 273 }; 274 275 pinctrl_fsys: pinctrl@13430000 { 276 compatible = "samsung,exynos7885-pinctrl"; 277 reg = <0x13430000 0x1000>; --- 8 unchanged lines hidden (view full) --- 286 287 pinctrl_dispaud: pinctrl@148f0000 { 288 compatible = "samsung,exynos7885-pinctrl"; 289 reg = <0x148f0000 0x1000>; 290 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 291 }; 292 293 pmu_system_controller: system-controller@11c80000 { |
292 compatible = "samsung,exynos7-pmu", "syscon"; | 294 compatible = "samsung,exynos7885-pmu", 295 "samsung,exynos7-pmu", "syscon"; |
293 reg = <0x11c80000 0x10000>; 294 }; 295 296 mmc_0: mmc@13500000 { | 296 reg = <0x11c80000 0x10000>; 297 }; 298 299 mmc_0: mmc@13500000 { |
297 compatible = "samsung,exynos7-dw-mshc-smu"; | 300 compatible = "samsung,exynos7885-dw-mshc-smu", 301 "samsung,exynos7-dw-mshc-smu"; |
298 reg = <0x13500000 0x2000>; 299 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 300 #address-cells = <1>; 301 #size-cells = <0>; 302 clocks = <&cmu_fsys CLK_GOUT_MMC_EMBD_ACLK>, 303 <&cmu_fsys CLK_GOUT_MMC_EMBD_SDCLKIN>; 304 clock-names = "biu", "ciu"; 305 fifo-depth = <0x40>; 306 status = "disabled"; 307 }; 308 309 serial_0: serial@13800000 { | 302 reg = <0x13500000 0x2000>; 303 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 304 #address-cells = <1>; 305 #size-cells = <0>; 306 clocks = <&cmu_fsys CLK_GOUT_MMC_EMBD_ACLK>, 307 <&cmu_fsys CLK_GOUT_MMC_EMBD_SDCLKIN>; 308 clock-names = "biu", "ciu"; 309 fifo-depth = <0x40>; 310 status = "disabled"; 311 }; 312 313 serial_0: serial@13800000 { |
310 compatible = "samsung,exynos5433-uart"; | 314 compatible = "samsung,exynos7885-uart", 315 "samsung,exynos5433-uart"; |
311 reg = <0x13800000 0x100>; 312 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 313 pinctrl-names = "default"; 314 pinctrl-0 = <&uart0_bus>; 315 clocks = <&cmu_peri CLK_GOUT_UART0_PCLK>, 316 <&cmu_peri CLK_GOUT_UART0_EXT_UCLK>; 317 clock-names = "uart", "clk_uart_baud0"; 318 samsung,uart-fifosize = <64>; 319 status = "disabled"; 320 }; 321 322 serial_1: serial@13810000 { | 316 reg = <0x13800000 0x100>; 317 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 318 pinctrl-names = "default"; 319 pinctrl-0 = <&uart0_bus>; 320 clocks = <&cmu_peri CLK_GOUT_UART0_PCLK>, 321 <&cmu_peri CLK_GOUT_UART0_EXT_UCLK>; 322 clock-names = "uart", "clk_uart_baud0"; 323 samsung,uart-fifosize = <64>; 324 status = "disabled"; 325 }; 326 327 serial_1: serial@13810000 { |
323 compatible = "samsung,exynos5433-uart"; | 328 compatible = "samsung,exynos7885-uart", 329 "samsung,exynos5433-uart"; |
324 reg = <0x13810000 0x100>; 325 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 326 pinctrl-names = "default"; 327 pinctrl-0 = <&uart1_bus>; 328 clocks = <&cmu_peri CLK_GOUT_UART1_PCLK>, 329 <&cmu_peri CLK_GOUT_UART1_EXT_UCLK>; 330 clock-names = "uart", "clk_uart_baud0"; 331 samsung,uart-fifosize = <256>; 332 status = "disabled"; 333 }; 334 335 serial_2: serial@13820000 { | 330 reg = <0x13810000 0x100>; 331 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 332 pinctrl-names = "default"; 333 pinctrl-0 = <&uart1_bus>; 334 clocks = <&cmu_peri CLK_GOUT_UART1_PCLK>, 335 <&cmu_peri CLK_GOUT_UART1_EXT_UCLK>; 336 clock-names = "uart", "clk_uart_baud0"; 337 samsung,uart-fifosize = <256>; 338 status = "disabled"; 339 }; 340 341 serial_2: serial@13820000 { |
336 compatible = "samsung,exynos5433-uart"; | 342 compatible = "samsung,exynos7885-uart", 343 "samsung,exynos5433-uart"; |
337 reg = <0x13820000 0x100>; 338 interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>; 339 pinctrl-names = "default"; 340 pinctrl-0 = <&uart2_bus>; 341 clocks = <&cmu_peri CLK_GOUT_UART2_PCLK>, 342 <&cmu_peri CLK_GOUT_UART2_EXT_UCLK>; 343 clock-names = "uart", "clk_uart_baud0"; 344 samsung,uart-fifosize = <256>; 345 status = "disabled"; 346 }; 347 348 i2c_0: i2c@13830000 { | 344 reg = <0x13820000 0x100>; 345 interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>; 346 pinctrl-names = "default"; 347 pinctrl-0 = <&uart2_bus>; 348 clocks = <&cmu_peri CLK_GOUT_UART2_PCLK>, 349 <&cmu_peri CLK_GOUT_UART2_EXT_UCLK>; 350 clock-names = "uart", "clk_uart_baud0"; 351 samsung,uart-fifosize = <256>; 352 status = "disabled"; 353 }; 354 355 i2c_0: i2c@13830000 { |
349 compatible = "samsung,s3c2440-i2c"; | 356 compatible = "samsung,exynos7885-i2c", 357 "samsung,s3c2440-i2c"; |
350 reg = <0x13830000 0x100>; 351 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 352 #address-cells = <1>; 353 #size-cells = <0>; 354 pinctrl-names = "default"; 355 pinctrl-0 = <&i2c0_bus>; 356 clocks = <&cmu_peri CLK_GOUT_I2C0_PCLK>; 357 clock-names = "i2c"; 358 status = "disabled"; 359 }; 360 361 i2c_1: i2c@13840000 { | 358 reg = <0x13830000 0x100>; 359 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 360 #address-cells = <1>; 361 #size-cells = <0>; 362 pinctrl-names = "default"; 363 pinctrl-0 = <&i2c0_bus>; 364 clocks = <&cmu_peri CLK_GOUT_I2C0_PCLK>; 365 clock-names = "i2c"; 366 status = "disabled"; 367 }; 368 369 i2c_1: i2c@13840000 { |
362 compatible = "samsung,s3c2440-i2c"; | 370 compatible = "samsung,exynos7885-i2c", 371 "samsung,s3c2440-i2c"; |
363 reg = <0x13840000 0x100>; 364 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 365 #address-cells = <1>; 366 #size-cells = <0>; 367 pinctrl-names = "default"; 368 pinctrl-0 = <&i2c1_bus>; 369 clocks = <&cmu_peri CLK_GOUT_I2C1_PCLK>; 370 clock-names = "i2c"; 371 status = "disabled"; 372 }; 373 374 i2c_2: i2c@13850000 { | 372 reg = <0x13840000 0x100>; 373 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 374 #address-cells = <1>; 375 #size-cells = <0>; 376 pinctrl-names = "default"; 377 pinctrl-0 = <&i2c1_bus>; 378 clocks = <&cmu_peri CLK_GOUT_I2C1_PCLK>; 379 clock-names = "i2c"; 380 status = "disabled"; 381 }; 382 383 i2c_2: i2c@13850000 { |
375 compatible = "samsung,s3c2440-i2c"; | 384 compatible = "samsung,exynos7885-i2c", 385 "samsung,s3c2440-i2c"; |
376 reg = <0x13850000 0x100>; 377 interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>; 378 #address-cells = <1>; 379 #size-cells = <0>; 380 pinctrl-names = "default"; 381 pinctrl-0 = <&i2c2_bus>; 382 clocks = <&cmu_peri CLK_GOUT_I2C2_PCLK>; 383 clock-names = "i2c"; 384 status = "disabled"; 385 }; 386 387 i2c_3: i2c@13860000 { | 386 reg = <0x13850000 0x100>; 387 interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>; 388 #address-cells = <1>; 389 #size-cells = <0>; 390 pinctrl-names = "default"; 391 pinctrl-0 = <&i2c2_bus>; 392 clocks = <&cmu_peri CLK_GOUT_I2C2_PCLK>; 393 clock-names = "i2c"; 394 status = "disabled"; 395 }; 396 397 i2c_3: i2c@13860000 { |
388 compatible = "samsung,s3c2440-i2c"; | 398 compatible = "samsung,exynos7885-i2c", 399 "samsung,s3c2440-i2c"; |
389 reg = <0x13860000 0x100>; 390 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 391 #address-cells = <1>; 392 #size-cells = <0>; 393 pinctrl-names = "default"; 394 pinctrl-0 = <&i2c3_bus>; 395 clocks = <&cmu_peri CLK_GOUT_I2C3_PCLK>; 396 clock-names = "i2c"; 397 status = "disabled"; 398 }; 399 400 i2c_4: i2c@13870000 { | 400 reg = <0x13860000 0x100>; 401 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 402 #address-cells = <1>; 403 #size-cells = <0>; 404 pinctrl-names = "default"; 405 pinctrl-0 = <&i2c3_bus>; 406 clocks = <&cmu_peri CLK_GOUT_I2C3_PCLK>; 407 clock-names = "i2c"; 408 status = "disabled"; 409 }; 410 411 i2c_4: i2c@13870000 { |
401 compatible = "samsung,s3c2440-i2c"; | 412 compatible = "samsung,exynos7885-i2c", 413 "samsung,s3c2440-i2c"; |
402 reg = <0x13870000 0x100>; 403 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 404 #address-cells = <1>; 405 #size-cells = <0>; 406 pinctrl-names = "default"; 407 pinctrl-0 = <&i2c4_bus>; 408 clocks = <&cmu_peri CLK_GOUT_I2C4_PCLK>; 409 clock-names = "i2c"; 410 status = "disabled"; 411 }; 412 413 i2c_5: i2c@13880000 { | 414 reg = <0x13870000 0x100>; 415 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 416 #address-cells = <1>; 417 #size-cells = <0>; 418 pinctrl-names = "default"; 419 pinctrl-0 = <&i2c4_bus>; 420 clocks = <&cmu_peri CLK_GOUT_I2C4_PCLK>; 421 clock-names = "i2c"; 422 status = "disabled"; 423 }; 424 425 i2c_5: i2c@13880000 { |
414 compatible = "samsung,s3c2440-i2c"; | 426 compatible = "samsung,exynos7885-i2c", 427 "samsung,s3c2440-i2c"; |
415 reg = <0x13880000 0x100>; 416 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 417 #address-cells = <1>; 418 #size-cells = <0>; 419 pinctrl-names = "default"; 420 pinctrl-0 = <&i2c5_bus>; 421 clocks = <&cmu_peri CLK_GOUT_I2C5_PCLK>; 422 clock-names = "i2c"; 423 status = "disabled"; 424 }; 425 426 i2c_6: i2c@13890000 { | 428 reg = <0x13880000 0x100>; 429 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 430 #address-cells = <1>; 431 #size-cells = <0>; 432 pinctrl-names = "default"; 433 pinctrl-0 = <&i2c5_bus>; 434 clocks = <&cmu_peri CLK_GOUT_I2C5_PCLK>; 435 clock-names = "i2c"; 436 status = "disabled"; 437 }; 438 439 i2c_6: i2c@13890000 { |
427 compatible = "samsung,s3c2440-i2c"; | 440 compatible = "samsung,exynos7885-i2c", 441 "samsung,s3c2440-i2c"; |
428 reg = <0x13890000 0x100>; 429 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 430 #address-cells = <1>; 431 #size-cells = <0>; 432 pinctrl-names = "default"; 433 pinctrl-0 = <&i2c6_bus>; 434 clocks = <&cmu_peri CLK_GOUT_I2C6_PCLK>; 435 clock-names = "i2c"; 436 status = "disabled"; 437 }; 438 439 i2c_7: i2c@11cd0000 { | 442 reg = <0x13890000 0x100>; 443 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 444 #address-cells = <1>; 445 #size-cells = <0>; 446 pinctrl-names = "default"; 447 pinctrl-0 = <&i2c6_bus>; 448 clocks = <&cmu_peri CLK_GOUT_I2C6_PCLK>; 449 clock-names = "i2c"; 450 status = "disabled"; 451 }; 452 453 i2c_7: i2c@11cd0000 { |
440 compatible = "samsung,s3c2440-i2c"; | 454 compatible = "samsung,exynos7885-i2c", 455 "samsung,s3c2440-i2c"; |
441 reg = <0x11cd0000 0x100>; 442 interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; 443 #address-cells = <1>; 444 #size-cells = <0>; 445 pinctrl-names = "default"; 446 pinctrl-0 = <&i2c7_bus>; 447 clocks = <&cmu_peri CLK_GOUT_I2C7_PCLK>; 448 clock-names = "i2c"; 449 status = "disabled"; 450 }; 451 }; 452}; 453 454#include "exynos7885-pinctrl.dtsi" 455#include "arm/samsung/exynos-syscon-restart.dtsi" | 456 reg = <0x11cd0000 0x100>; 457 interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; 458 #address-cells = <1>; 459 #size-cells = <0>; 460 pinctrl-names = "default"; 461 pinctrl-0 = <&i2c7_bus>; 462 clocks = <&cmu_peri CLK_GOUT_I2C7_PCLK>; 463 clock-names = "i2c"; 464 status = "disabled"; 465 }; 466 }; 467}; 468 469#include "exynos7885-pinctrl.dtsi" 470#include "arm/samsung/exynos-syscon-restart.dtsi" |