s700.dtsi (3eb66e91a25497065c5322b1268cbc3953642227) s700.dtsi (31af04cd60d3162a58213363fd740a2b0cf0a08e)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2017 Andreas Färber
4 */
5
6#include <dt-bindings/clock/actions,s700-cmu.h>
7#include <dt-bindings/interrupt-controller/arm-gic.h>
8

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13 #size-cells = <2>;
14
15 cpus {
16 #address-cells = <2>;
17 #size-cells = <0>;
18
19 cpu0: cpu@0 {
20 device_type = "cpu";
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2017 Andreas Färber
4 */
5
6#include <dt-bindings/clock/actions,s700-cmu.h>
7#include <dt-bindings/interrupt-controller/arm-gic.h>
8

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13 #size-cells = <2>;
14
15 cpus {
16 #address-cells = <2>;
17 #size-cells = <0>;
18
19 cpu0: cpu@0 {
20 device_type = "cpu";
21 compatible = "arm,cortex-a53", "arm,armv8";
21 compatible = "arm,cortex-a53";
22 reg = <0x0 0x0>;
23 enable-method = "psci";
24 };
25
26 cpu1: cpu@1 {
27 device_type = "cpu";
22 reg = <0x0 0x0>;
23 enable-method = "psci";
24 };
25
26 cpu1: cpu@1 {
27 device_type = "cpu";
28 compatible = "arm,cortex-a53", "arm,armv8";
28 compatible = "arm,cortex-a53";
29 reg = <0x0 0x1>;
30 enable-method = "psci";
31 };
32
33 cpu2: cpu@2 {
34 device_type = "cpu";
29 reg = <0x0 0x1>;
30 enable-method = "psci";
31 };
32
33 cpu2: cpu@2 {
34 device_type = "cpu";
35 compatible = "arm,cortex-a53", "arm,armv8";
35 compatible = "arm,cortex-a53";
36 reg = <0x0 0x2>;
37 enable-method = "psci";
38 };
39
40 cpu3: cpu@3 {
41 device_type = "cpu";
36 reg = <0x0 0x2>;
37 enable-method = "psci";
38 };
39
40 cpu3: cpu@3 {
41 device_type = "cpu";
42 compatible = "arm,cortex-a53", "arm,armv8";
42 compatible = "arm,cortex-a53";
43 reg = <0x0 0x3>;
44 enable-method = "psci";
45 };
46 };
47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;

--- 140 unchanged lines hidden --- 		43 reg = <0x0 0x3>;
44 enable-method = "psci";
45 };
46 };
47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;

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