proc-arm920.S (25985edcedea6396277003854657b5f3cb31a628) proc-arm920.S (29ea23ff905d07d8559bac69cca46f4bbf20038c)
1/*
2 * linux/arch/arm/mm/proc-arm920.S: MMU functions for ARM920
3 *
4 * Copyright (C) 1999,2000 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 * hacked for non-paged-MM by Hyok S. Choi, 2003.
7 *
8 * This program is free software; you can redistribute it and/or modify

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48/*
49 * The number of lines in a cache segment.
50 */
51#define CACHE_DENTRIES 64
52
53/*
54 * This is the size at which it becomes more efficient to
55 * clean the whole cache, rather than using the individual
1/*
2 * linux/arch/arm/mm/proc-arm920.S: MMU functions for ARM920
3 *
4 * Copyright (C) 1999,2000 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 * hacked for non-paged-MM by Hyok S. Choi, 2003.
7 *
8 * This program is free software; you can redistribute it and/or modify

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48/*
49 * The number of lines in a cache segment.
50 */
51#define CACHE_DENTRIES 64
52
53/*
54 * This is the size at which it becomes more efficient to
55 * clean the whole cache, rather than using the individual
56 * cache line maintenance instructions.
56 * cache line maintainence instructions.
57 */
58#define CACHE_DLIMIT 65536
59
60
61 .text
62/*
63 * cpu_arm920_proc_init()
64 */

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385 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
386 mcr p15, 0, r0, c7, c10, 4 @ drain WB
387#endif
388 mov pc, lr
389
390/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
391.globl cpu_arm920_suspend_size
392.equ cpu_arm920_suspend_size, 4 * 3
57 */
58#define CACHE_DLIMIT 65536
59
60
61 .text
62/*
63 * cpu_arm920_proc_init()
64 */

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385 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
386 mcr p15, 0, r0, c7, c10, 4 @ drain WB
387#endif
388 mov pc, lr
389
390/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
391.globl cpu_arm920_suspend_size
392.equ cpu_arm920_suspend_size, 4 * 3
393#ifdef CONFIG_PM
393#ifdef CONFIG_PM_SLEEP
394ENTRY(cpu_arm920_do_suspend)
395 stmfd sp!, {r4 - r7, lr}
396 mrc p15, 0, r4, c13, c0, 0 @ PID
397 mrc p15, 0, r5, c3, c0, 0 @ Domain ID
398 mrc p15, 0, r6, c2, c0, 0 @ TTB address
399 mrc p15, 0, r7, c1, c0, 0 @ Control register
400 stmia r0, {r4 - r7}
401 ldmfd sp!, {r4 - r7, pc}

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394ENTRY(cpu_arm920_do_suspend)
395 stmfd sp!, {r4 - r7, lr}
396 mrc p15, 0, r4, c13, c0, 0 @ PID
397 mrc p15, 0, r5, c3, c0, 0 @ Domain ID
398 mrc p15, 0, r6, c2, c0, 0 @ TTB address
399 mrc p15, 0, r7, c1, c0, 0 @ Control register
400 stmia r0, {r4 - r7}
401 ldmfd sp!, {r4 - r7, pc}

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