flush.c (6012191aa9c6ffff3a23b81162298318b56d7cb3) | flush.c (85848dd7ab75fce1134856228582a8df522c91d9) |
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1/* 2 * linux/arch/arm/mm/flush.c 3 * 4 * Copyright (C) 1995-2002 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10#include <linux/module.h> 11#include <linux/mm.h> 12#include <linux/pagemap.h> 13 14#include <asm/cacheflush.h> 15#include <asm/cachetype.h> 16#include <asm/highmem.h> 17#include <asm/smp_plat.h> 18#include <asm/system.h> 19#include <asm/tlbflush.h> | 1/* 2 * linux/arch/arm/mm/flush.c 3 * 4 * Copyright (C) 1995-2002 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10#include <linux/module.h> 11#include <linux/mm.h> 12#include <linux/pagemap.h> 13 14#include <asm/cacheflush.h> 15#include <asm/cachetype.h> 16#include <asm/highmem.h> 17#include <asm/smp_plat.h> 18#include <asm/system.h> 19#include <asm/tlbflush.h> |
20#include <asm/smp_plat.h> |
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20 21#include "mm.h" 22 23#ifdef CONFIG_CPU_CACHE_VIPT 24 25#define ALIAS_FLUSH_START 0xffff4000 26 27static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr) --- 60 unchanged lines hidden (view full) --- 88 89 if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged()) 90 __flush_icache_all(); 91} 92#else 93#define flush_pfn_alias(pfn,vaddr) do { } while (0) 94#endif 95 | 21 22#include "mm.h" 23 24#ifdef CONFIG_CPU_CACHE_VIPT 25 26#define ALIAS_FLUSH_START 0xffff4000 27 28static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr) --- 60 unchanged lines hidden (view full) --- 89 90 if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged()) 91 __flush_icache_all(); 92} 93#else 94#define flush_pfn_alias(pfn,vaddr) do { } while (0) 95#endif 96 |
96#ifdef CONFIG_SMP | |
97static void flush_ptrace_access_other(void *args) 98{ 99 __flush_icache_all(); 100} | 97static void flush_ptrace_access_other(void *args) 98{ 99 __flush_icache_all(); 100} |
101#endif | |
102 103static 104void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, 105 unsigned long uaddr, void *kaddr, unsigned long len) 106{ 107 if (cache_is_vivt()) { 108 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { 109 unsigned long addr = (unsigned long)kaddr; --- 7 unchanged lines hidden (view full) --- 117 __flush_icache_all(); 118 return; 119 } 120 121 /* VIPT non-aliasing cache */ 122 if (vma->vm_flags & VM_EXEC) { 123 unsigned long addr = (unsigned long)kaddr; 124 __cpuc_coherent_kern_range(addr, addr + len); | 101 102static 103void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, 104 unsigned long uaddr, void *kaddr, unsigned long len) 105{ 106 if (cache_is_vivt()) { 107 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { 108 unsigned long addr = (unsigned long)kaddr; --- 7 unchanged lines hidden (view full) --- 116 __flush_icache_all(); 117 return; 118 } 119 120 /* VIPT non-aliasing cache */ 121 if (vma->vm_flags & VM_EXEC) { 122 unsigned long addr = (unsigned long)kaddr; 123 __cpuc_coherent_kern_range(addr, addr + len); |
125#ifdef CONFIG_SMP | |
126 if (cache_ops_need_broadcast()) 127 smp_call_function(flush_ptrace_access_other, 128 NULL, 1); | 124 if (cache_ops_need_broadcast()) 125 smp_call_function(flush_ptrace_access_other, 126 NULL, 1); |
129#endif | |
130 } 131} 132 133/* 134 * Copy user data from/to a page which is mapped into a different 135 * processes address space. Really, we want to allow our "user 136 * space" model to handle this. 137 * --- 133 unchanged lines hidden (view full) --- 271 * The zero page is never written to, so never has any dirty 272 * cache lines, and therefore never needs to be flushed. 273 */ 274 if (page == ZERO_PAGE(0)) 275 return; 276 277 mapping = page_mapping(page); 278 | 127 } 128} 129 130/* 131 * Copy user data from/to a page which is mapped into a different 132 * processes address space. Really, we want to allow our "user 133 * space" model to handle this. 134 * --- 133 unchanged lines hidden (view full) --- 268 * The zero page is never written to, so never has any dirty 269 * cache lines, and therefore never needs to be flushed. 270 */ 271 if (page == ZERO_PAGE(0)) 272 return; 273 274 mapping = page_mapping(page); 275 |
279#ifndef CONFIG_SMP 280 if (mapping && !mapping_mapped(mapping)) | 276 if (!cache_ops_need_broadcast() && 277 mapping && !mapping_mapped(mapping)) |
281 clear_bit(PG_dcache_clean, &page->flags); | 278 clear_bit(PG_dcache_clean, &page->flags); |
282 else 283#endif 284 { | 279 else { |
285 __flush_dcache_page(mapping, page); 286 if (mapping && cache_is_vivt()) 287 __flush_dcache_aliases(mapping, page); 288 else if (mapping) 289 __flush_icache_all(); 290 set_bit(PG_dcache_clean, &page->flags); 291 } 292} --- 41 unchanged lines hidden --- | 280 __flush_dcache_page(mapping, page); 281 if (mapping && cache_is_vivt()) 282 __flush_dcache_aliases(mapping, page); 283 else if (mapping) 284 __flush_icache_all(); 285 set_bit(PG_dcache_clean, &page->flags); 286 } 287} --- 41 unchanged lines hidden --- |