slcr.c (5e2182803497c22d50675f0f3af12bf5305e8716) slcr.c (7b274efef794fe566ee42f3091276d0598952558)
1/*
2 * Xilinx SLCR driver
3 *
4 * Copyright (c) 2011-2013 Xilinx Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version

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26#define SLCR_PS_RST_CTRL_OFFSET 0x200 /* PS Software Reset Control */
27#define SLCR_A9_CPU_RST_CTRL_OFFSET 0x244 /* CPU Software Reset Control */
28#define SLCR_REBOOT_STATUS_OFFSET 0x258 /* PS Reboot Status */
29
30#define SLCR_UNLOCK_MAGIC 0xDF0D
31#define SLCR_A9_CPU_CLKSTOP 0x10
32#define SLCR_A9_CPU_RST 0x1
33
1/*
2 * Xilinx SLCR driver
3 *
4 * Copyright (c) 2011-2013 Xilinx Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version

--- 17 unchanged lines hidden (view full) ---

26#define SLCR_PS_RST_CTRL_OFFSET 0x200 /* PS Software Reset Control */
27#define SLCR_A9_CPU_RST_CTRL_OFFSET 0x244 /* CPU Software Reset Control */
28#define SLCR_REBOOT_STATUS_OFFSET 0x258 /* PS Reboot Status */
29
30#define SLCR_UNLOCK_MAGIC 0xDF0D
31#define SLCR_A9_CPU_CLKSTOP 0x10
32#define SLCR_A9_CPU_RST 0x1
33
34void __iomem *zynq_slcr_base;
34static void __iomem *zynq_slcr_base;
35static struct regmap *zynq_slcr_regmap;
36
37/**
38 * zynq_slcr_system_reset - Reset the entire system.
39 */
40void zynq_slcr_system_reset(void)
41{
42 u32 reboot;

--- 94 unchanged lines hidden --- 		35static struct regmap *zynq_slcr_regmap;
36
37/**
38 * zynq_slcr_system_reset - Reset the entire system.
39 */
40void zynq_slcr_system_reset(void)
41{
42 u32 reboot;

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