common.c (879f99ef2c4c05d9a7f0a67a05f1415663119825) common.c (00f7dc636366f72474b1896f4990b3c086cd2c6d)
1/*
2 * This file contains common code that is intended to be used across
3 * boards so that it's not replicated.
4 *
5 * Copyright (C) 2011 Xilinx
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and

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24#include <linux/clocksource.h>
25#include <linux/of_address.h>
26#include <linux/of_irq.h>
27#include <linux/of_platform.h>
28#include <linux/of.h>
29#include <linux/memblock.h>
30#include <linux/irqchip.h>
31#include <linux/irqchip/arm-gic.h>
1/*
2 * This file contains common code that is intended to be used across
3 * boards so that it's not replicated.
4 *
5 * Copyright (C) 2011 Xilinx
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and

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24#include <linux/clocksource.h>
25#include <linux/of_address.h>
26#include <linux/of_irq.h>
27#include <linux/of_platform.h>
28#include <linux/of.h>
29#include <linux/memblock.h>
30#include <linux/irqchip.h>
31#include <linux/irqchip/arm-gic.h>
32#include <linux/slab.h>
33#include <linux/sys_soc.h>
32
33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35#include <asm/mach/time.h>
36#include <asm/mach-types.h>
37#include <asm/page.h>
38#include <asm/pgtable.h>
39#include <asm/smp_scu.h>
34
35#include <asm/mach/arch.h>
36#include <asm/mach/map.h>
37#include <asm/mach/time.h>
38#include <asm/mach-types.h>
39#include <asm/page.h>
40#include <asm/pgtable.h>
41#include <asm/smp_scu.h>
42#include <asm/system_info.h>
40#include <asm/hardware/cache-l2x0.h>
41
42#include "common.h"
43
43#include <asm/hardware/cache-l2x0.h>
44
45#include "common.h"
46
47#define ZYNQ_DEVCFG_MCTRL 0x80
48#define ZYNQ_DEVCFG_PS_VERSION_SHIFT 28
49#define ZYNQ_DEVCFG_PS_VERSION_MASK 0xF
50
44void __iomem *zynq_scu_base;
45
46/**
47 * zynq_memory_init - Initialize special memory
48 *
49 * We need to stop things allocating the low memory as DMA can't work in
50 * the 1st 512K of memory.
51 */
52static void __init zynq_memory_init(void)
53{
54 if (!__pa(PAGE_OFFSET))
55 memblock_reserve(__pa(PAGE_OFFSET), __pa(swapper_pg_dir));
56}
57
58static struct platform_device zynq_cpuidle_device = {
59 .name = "cpuidle-zynq",
60};
61
62/**
51void __iomem *zynq_scu_base;
52
53/**
54 * zynq_memory_init - Initialize special memory
55 *
56 * We need to stop things allocating the low memory as DMA can't work in
57 * the 1st 512K of memory.
58 */
59static void __init zynq_memory_init(void)
60{
61 if (!__pa(PAGE_OFFSET))
62 memblock_reserve(__pa(PAGE_OFFSET), __pa(swapper_pg_dir));
63}
64
65static struct platform_device zynq_cpuidle_device = {
66 .name = "cpuidle-zynq",
67};
68
69/**
70 * zynq_get_revision - Get Zynq silicon revision
71 *
72 * Return: Silicon version or -1 otherwise
73 */
74static int __init zynq_get_revision(void)
75{
76 struct device_node *np;
77 void __iomem *zynq_devcfg_base;
78 u32 revision;
79
80 np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-devcfg-1.0");
81 if (!np) {
82 pr_err("%s: no devcfg node found\n", __func__);
83 return -1;
84 }
85
86 zynq_devcfg_base = of_iomap(np, 0);
87 if (!zynq_devcfg_base) {
88 pr_err("%s: Unable to map I/O memory\n", __func__);
89 return -1;
90 }
91
92 revision = readl(zynq_devcfg_base + ZYNQ_DEVCFG_MCTRL);
93 revision >>= ZYNQ_DEVCFG_PS_VERSION_SHIFT;
94 revision &= ZYNQ_DEVCFG_PS_VERSION_MASK;
95
96 iounmap(zynq_devcfg_base);
97
98 return revision;
99}
100
101/**
63 * zynq_init_machine - System specific initialization, intended to be
64 * called from board specific initialization.
65 */
66static void __init zynq_init_machine(void)
67{
68 struct platform_device_info devinfo = { .name = "cpufreq-cpu0", };
102 * zynq_init_machine - System specific initialization, intended to be
103 * called from board specific initialization.
104 */
105static void __init zynq_init_machine(void)
106{
107 struct platform_device_info devinfo = { .name = "cpufreq-cpu0", };
108 struct soc_device_attribute *soc_dev_attr;
109 struct soc_device *soc_dev;
110 struct device *parent = NULL;
69
70 /*
71 * 64KB way size, 8-way associativity, parity disabled
72 */
73 l2x0_of_init(0x02060000, 0xF0F0FFFF);
74
111
112 /*
113 * 64KB way size, 8-way associativity, parity disabled
114 */
115 l2x0_of_init(0x02060000, 0xF0F0FFFF);
116
75 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
117 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
118 if (!soc_dev_attr)
119 goto out;
76
120
121 system_rev = zynq_get_revision();
122
123 soc_dev_attr->family = kasprintf(GFP_KERNEL, "Xilinx Zynq");
124 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "0x%x", system_rev);
125 soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "0x%x",
126 zynq_slcr_get_device_id());
127
128 soc_dev = soc_device_register(soc_dev_attr);
129 if (IS_ERR(soc_dev)) {
130 kfree(soc_dev_attr->family);
131 kfree(soc_dev_attr->revision);
132 kfree(soc_dev_attr->soc_id);
133 kfree(soc_dev_attr);
134 goto out;
135 }
136
137 parent = soc_device_to_device(soc_dev);
138
139out:
140 /*
141 * Finished with the static registrations now; fill in the missing
142 * devices
143 */
144 of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
145
77 platform_device_register(&zynq_cpuidle_device);
78 platform_device_register_full(&devinfo);
79
80 zynq_slcr_init();
81}
82
83static void __init zynq_timer_init(void)
84{

--- 60 unchanged lines hidden --- 		146 platform_device_register(&zynq_cpuidle_device);
147 platform_device_register_full(&devinfo);
148
149 zynq_slcr_init();
150}
151
152static void __init zynq_timer_init(void)
153{

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