pm.c (95872f427eca73b19ac9466c25afd9bb876dc1aa) pm.c (e7a932b1961c3936c7ae5b8d1628f39dc50a746d)
1/*
2 * CPU complex suspend & resume functions for Tegra SoCs
3 *
4 * Copyright (c) 2009-2012, NVIDIA Corporation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.

--- 195 unchanged lines hidden (view full) ---

204 *
205 * Hooking the address of LP1 reset vector and SDRAM self-refresh code in
206 * SDRAM. These codes not be copied to IRAM in this fuction. We need to
207 * copy these code to IRAM before LP0/LP1 suspend and restore the content
208 * of IRAM after resume.
209 */
210static bool tegra_lp1_iram_hook(void)
211{
1/*
2 * CPU complex suspend & resume functions for Tegra SoCs
3 *
4 * Copyright (c) 2009-2012, NVIDIA Corporation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.

--- 195 unchanged lines hidden (view full) ---

204 *
205 * Hooking the address of LP1 reset vector and SDRAM self-refresh code in
206 * SDRAM. These codes not be copied to IRAM in this fuction. We need to
207 * copy these code to IRAM before LP0/LP1 suspend and restore the content
208 * of IRAM after resume.
209 */
210static bool tegra_lp1_iram_hook(void)
211{
212 switch (tegra_chip_id) {
213 case TEGRA30:
214 if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC))
215 tegra30_lp1_iram_hook();
216 break;
217 default:
218 break;
219 }
220
212 if (!tegra_lp1_iram.start_addr || !tegra_lp1_iram.end_addr)
213 return false;
214
215 iram_save_size = tegra_lp1_iram.end_addr - tegra_lp1_iram.start_addr;
216 iram_save_addr = kmalloc(iram_save_size, GFP_KERNEL);
217 if (!iram_save_addr)
218 return false;
219
220 return true;
221}
222
223static bool tegra_sleep_core_init(void)
224{
221 if (!tegra_lp1_iram.start_addr || !tegra_lp1_iram.end_addr)
222 return false;
223
224 iram_save_size = tegra_lp1_iram.end_addr - tegra_lp1_iram.start_addr;
225 iram_save_addr = kmalloc(iram_save_size, GFP_KERNEL);
226 if (!iram_save_addr)
227 return false;
228
229 return true;
230}
231
232static bool tegra_sleep_core_init(void)
233{
234 switch (tegra_chip_id) {
235 case TEGRA30:
236 if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC))
237 tegra30_sleep_core_init();
238 break;
239 default:
240 break;
241 }
242
225 if (!tegra_sleep_core_finish)
226 return false;
227
228 return true;
229}
230
231static void tegra_suspend_enter_lp1(void)
232{

--- 114 unchanged lines hidden --- 		243 if (!tegra_sleep_core_finish)
244 return false;
245
246 return true;
247}
248
249static void tegra_suspend_enter_lp1(void)
250{

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