socfpga.c (c78a85a8430e35aecd53e190a2f6b999062b1037) | socfpga.c (ff6fd1478c531a40279cf013227279f31ff90b41) |
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1/* 2 * Copyright (C) 2012-2015 Altera Corporation 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * --- 52 unchanged lines hidden (view full) --- 61 socfpga_sysmgr_init(); 62 if (IS_ENABLED(CONFIG_EDAC_ALTERA_L2C)) 63 socfpga_init_l2_ecc(); 64 65 if (IS_ENABLED(CONFIG_EDAC_ALTERA_OCRAM)) 66 socfpga_init_ocram_ecc(); 67} 68 | 1/* 2 * Copyright (C) 2012-2015 Altera Corporation 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * --- 52 unchanged lines hidden (view full) --- 61 socfpga_sysmgr_init(); 62 if (IS_ENABLED(CONFIG_EDAC_ALTERA_L2C)) 63 socfpga_init_l2_ecc(); 64 65 if (IS_ENABLED(CONFIG_EDAC_ALTERA_OCRAM)) 66 socfpga_init_ocram_ecc(); 67} 68 |
69static void __init socfpga_arria10_init_irq(void) 70{ 71 irqchip_init(); 72 socfpga_sysmgr_init(); 73 if (IS_ENABLED(CONFIG_EDAC_ALTERA_L2C)) 74 socfpga_init_arria10_l2_ecc(); 75} 76 |
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69static void socfpga_cyclone5_restart(enum reboot_mode mode, const char *cmd) 70{ 71 u32 temp; 72 73 temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); 74 75 if (mode == REBOOT_HARD) 76 temp |= RSTMGR_CTRL_SWCOLDRSTREQ; --- 31 unchanged lines hidden (view full) --- 108static const char *altera_a10_dt_match[] = { 109 "altr,socfpga-arria10", 110 NULL 111}; 112 113DT_MACHINE_START(SOCFPGA_A10, "Altera SOCFPGA Arria10") 114 .l2c_aux_val = 0, 115 .l2c_aux_mask = ~0, | 77static void socfpga_cyclone5_restart(enum reboot_mode mode, const char *cmd) 78{ 79 u32 temp; 80 81 temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); 82 83 if (mode == REBOOT_HARD) 84 temp |= RSTMGR_CTRL_SWCOLDRSTREQ; --- 31 unchanged lines hidden (view full) --- 116static const char *altera_a10_dt_match[] = { 117 "altr,socfpga-arria10", 118 NULL 119}; 120 121DT_MACHINE_START(SOCFPGA_A10, "Altera SOCFPGA Arria10") 122 .l2c_aux_val = 0, 123 .l2c_aux_mask = ~0, |
116 .init_irq = socfpga_init_irq, | 124 .init_irq = socfpga_arria10_init_irq, |
117 .restart = socfpga_arria10_restart, 118 .dt_compat = altera_a10_dt_match, 119MACHINE_END | 125 .restart = socfpga_arria10_restart, 126 .dt_compat = altera_a10_dt_match, 127MACHINE_END |