time.c (e5451c8f8330e03ad3cfa16048b4daf961af434f) | time.c (a44c1d700c848e221d80aab1029d36a60d21a0f4) |
---|---|
1/* 2 * linux/arch/arm/common/time-acorn.c 3 * 4 * Copyright (c) 1996-2000 Russell King. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Changelog: 11 * 24-Sep-1996 RMK Created 12 * 10-Oct-1996 RMK Brought up to date with arch-sa110eval 13 * 04-Dec-1997 RMK Updated for new arch/arm/time.c 14 * 13=Jun-2004 DS Moved to arch/arm/common b/c shared w/CLPS7500 15 */ | 1/* 2 * linux/arch/arm/common/time-acorn.c 3 * 4 * Copyright (c) 1996-2000 Russell King. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Changelog: 11 * 24-Sep-1996 RMK Created 12 * 10-Oct-1996 RMK Brought up to date with arch-sa110eval 13 * 04-Dec-1997 RMK Updated for new arch/arm/time.c 14 * 13=Jun-2004 DS Moved to arch/arm/common b/c shared w/CLPS7500 15 */ |
16#include <linux/timex.h> | 16#include <linux/clocksource.h> |
17#include <linux/init.h> 18#include <linux/interrupt.h> 19#include <linux/irq.h> 20#include <linux/io.h> 21 22#include <mach/hardware.h> 23#include <asm/hardware/ioc.h> 24 25#include <asm/mach/time.h> 26 27#define RPC_CLOCK_FREQ 2000000 28#define RPC_LATCH DIV_ROUND_CLOSEST(RPC_CLOCK_FREQ, HZ) 29 | 17#include <linux/init.h> 18#include <linux/interrupt.h> 19#include <linux/irq.h> 20#include <linux/io.h> 21 22#include <mach/hardware.h> 23#include <asm/hardware/ioc.h> 24 25#include <asm/mach/time.h> 26 27#define RPC_CLOCK_FREQ 2000000 28#define RPC_LATCH DIV_ROUND_CLOSEST(RPC_CLOCK_FREQ, HZ) 29 |
30static u32 ioc_timer_gettimeoffset(void) | 30static u32 ioc_time; 31 32static u64 ioc_timer_read(struct clocksource *cs) |
31{ 32 unsigned int count1, count2, status; | 33{ 34 unsigned int count1, count2, status; |
33 long offset; | 35 unsigned long flags; 36 u32 ticks; |
34 | 37 |
38 local_irq_save(flags); |
|
35 ioc_writeb (0, IOC_T0LATCH); 36 barrier (); 37 count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); 38 barrier (); 39 status = ioc_readb(IOC_IRQREQA); 40 barrier (); 41 ioc_writeb (0, IOC_T0LATCH); 42 barrier (); 43 count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); | 39 ioc_writeb (0, IOC_T0LATCH); 40 barrier (); 41 count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); 42 barrier (); 43 status = ioc_readb(IOC_IRQREQA); 44 barrier (); 45 ioc_writeb (0, IOC_T0LATCH); 46 barrier (); 47 count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); |
48 ticks = ioc_time + RPC_LATCH - count2; 49 local_irq_restore(flags); |
|
44 | 50 |
45 offset = count2; | |
46 if (count2 < count1) { 47 /* | 51 if (count2 < count1) { 52 /* |
48 * We have not had an interrupt between reading count1 49 * and count2. | 53 * The timer has not reloaded between reading count1 and 54 * count2, check whether an interrupt was actually pending. |
50 */ 51 if (status & (1 << 5)) | 55 */ 56 if (status & (1 << 5)) |
52 offset -= RPC_LATCH; | 57 ticks += RPC_LATCH; |
53 } else if (count2 > count1) { 54 /* | 58 } else if (count2 > count1) { 59 /* |
55 * We have just had another interrupt between reading 56 * count1 and count2. | 60 * The timer has reloaded, so count2 indicates the new 61 * count since the wrap. The interrupt would not have 62 * been processed, so add the missed ticks. |
57 */ | 63 */ |
58 offset -= RPC_LATCH; | 64 ticks += RPC_LATCH; |
59 } 60 | 65 } 66 |
61 offset = (RPC_LATCH - offset) * (tick_nsec / 1000); 62 return DIV_ROUND_CLOSEST(offset, RPC_LATCH) * 1000; | 67 return ticks; |
63} 64 | 68} 69 |
70static struct clocksource ioctime_clocksource = { 71 .read = ioc_timer_read, 72 .mask = CLOCKSOURCE_MASK(32), 73 .rating = 100, 74}; 75 |
|
65void __init ioctime_init(void) 66{ 67 ioc_writeb(RPC_LATCH & 255, IOC_T0LTCHL); 68 ioc_writeb(RPC_LATCH >> 8, IOC_T0LTCHH); 69 ioc_writeb(0, IOC_T0GO); 70} 71 72static irqreturn_t 73ioc_timer_interrupt(int irq, void *dev_id) 74{ | 76void __init ioctime_init(void) 77{ 78 ioc_writeb(RPC_LATCH & 255, IOC_T0LTCHL); 79 ioc_writeb(RPC_LATCH >> 8, IOC_T0LTCHH); 80 ioc_writeb(0, IOC_T0GO); 81} 82 83static irqreturn_t 84ioc_timer_interrupt(int irq, void *dev_id) 85{ |
86 ioc_time += RPC_LATCH; |
|
75 timer_tick(); 76 return IRQ_HANDLED; 77} 78 79static struct irqaction ioc_timer_irq = { 80 .name = "timer", 81 .handler = ioc_timer_interrupt 82}; 83 84/* 85 * Set up timer interrupt. 86 */ 87void __init ioc_timer_init(void) 88{ | 87 timer_tick(); 88 return IRQ_HANDLED; 89} 90 91static struct irqaction ioc_timer_irq = { 92 .name = "timer", 93 .handler = ioc_timer_interrupt 94}; 95 96/* 97 * Set up timer interrupt. 98 */ 99void __init ioc_timer_init(void) 100{ |
89 arch_gettimeoffset = ioc_timer_gettimeoffset; | 101 WARN_ON(clocksource_register_hz(&ioctime_clocksource, RPC_CLOCK_FREQ)); |
90 ioctime_init(); 91 setup_irq(IRQ_TIMER0, &ioc_timer_irq); 92} | 102 ioctime_init(); 103 setup_irq(IRQ_TIMER0, &ioc_timer_irq); 104} |