smemc.c (97eb3f24352ec6632c2127b35d8087d2a809a9b9) smemc.c (2eaa03b5bebd1e80014f780d7bf27c3e66daefd6)
1/*
2 * Static Memory Controller
3 */
4
5#include <linux/module.h>
6#include <linux/kernel.h>
7#include <linux/init.h>
8#include <linux/io.h>
1/*
2 * Static Memory Controller
3 */
4
5#include <linux/module.h>
6#include <linux/kernel.h>
7#include <linux/init.h>
8#include <linux/io.h>
9#include <linux/sysdev.h>
9#include <linux/syscore_ops.h>
10
11#include <mach/hardware.h>
12#include <mach/smemc.h>
13
14#ifdef CONFIG_PM
15static unsigned long msc[2];
16static unsigned long sxcnfg, memclkcfg;
17static unsigned long csadrcfg[4];
18
10
11#include <mach/hardware.h>
12#include <mach/smemc.h>
13
14#ifdef CONFIG_PM
15static unsigned long msc[2];
16static unsigned long sxcnfg, memclkcfg;
17static unsigned long csadrcfg[4];
18
19static int pxa3xx_smemc_suspend(struct sys_device *dev, pm_message_t state)
19static int pxa3xx_smemc_suspend(void)
20{
21 msc[0] = __raw_readl(MSC0);
22 msc[1] = __raw_readl(MSC1);
23 sxcnfg = __raw_readl(SXCNFG);
24 memclkcfg = __raw_readl(MEMCLKCFG);
25 csadrcfg[0] = __raw_readl(CSADRCFG0);
26 csadrcfg[1] = __raw_readl(CSADRCFG1);
27 csadrcfg[2] = __raw_readl(CSADRCFG2);
28 csadrcfg[3] = __raw_readl(CSADRCFG3);
29
30 return 0;
31}
32
20{
21 msc[0] = __raw_readl(MSC0);
22 msc[1] = __raw_readl(MSC1);
23 sxcnfg = __raw_readl(SXCNFG);
24 memclkcfg = __raw_readl(MEMCLKCFG);
25 csadrcfg[0] = __raw_readl(CSADRCFG0);
26 csadrcfg[1] = __raw_readl(CSADRCFG1);
27 csadrcfg[2] = __raw_readl(CSADRCFG2);
28 csadrcfg[3] = __raw_readl(CSADRCFG3);
29
30 return 0;
31}
32
33static int pxa3xx_smemc_resume(struct sys_device *dev)
33static void pxa3xx_smemc_resume(void)
34{
35 __raw_writel(msc[0], MSC0);
36 __raw_writel(msc[1], MSC1);
37 __raw_writel(sxcnfg, SXCNFG);
38 __raw_writel(memclkcfg, MEMCLKCFG);
39 __raw_writel(csadrcfg[0], CSADRCFG0);
40 __raw_writel(csadrcfg[1], CSADRCFG1);
41 __raw_writel(csadrcfg[2], CSADRCFG2);
42 __raw_writel(csadrcfg[3], CSADRCFG3);
34{
35 __raw_writel(msc[0], MSC0);
36 __raw_writel(msc[1], MSC1);
37 __raw_writel(sxcnfg, SXCNFG);
38 __raw_writel(memclkcfg, MEMCLKCFG);
39 __raw_writel(csadrcfg[0], CSADRCFG0);
40 __raw_writel(csadrcfg[1], CSADRCFG1);
41 __raw_writel(csadrcfg[2], CSADRCFG2);
42 __raw_writel(csadrcfg[3], CSADRCFG3);
43
44 return 0;
45}
46
43}
44
47static struct sysdev_class smemc_sysclass = {
48 .name = "smemc",
45static struct syscore_ops smemc_syscore_ops = {
49 .suspend = pxa3xx_smemc_suspend,
50 .resume = pxa3xx_smemc_resume,
51};
52
46 .suspend = pxa3xx_smemc_suspend,
47 .resume = pxa3xx_smemc_resume,
48};
49
53static struct sys_device smemc_sysdev = {
54 .id = 0,
55 .cls = &smemc_sysclass,
56};
57
58static int __init smemc_init(void)
59{
50static int __init smemc_init(void)
51{
60 int ret = 0;
52 if (cpu_is_pxa3xx())
53 register_syscore_ops(&smemc_syscore_ops);
61
54
62 if (cpu_is_pxa3xx()) {
63 ret = sysdev_class_register(&smemc_sysclass);
64 if (ret)
65 return ret;
66
67 ret = sysdev_register(&smemc_sysdev);
68 }
69
70 return ret;
55 return 0;
71}
72subsys_initcall(smemc_init);
73#endif
56}
57subsys_initcall(smemc_init);
58#endif