pxa3xx.c (f43dc23d5ea91fca257be02138a255f02d98e806) pxa3xx.c (a3f4c927d379cfaa597bc8ff75dc9d28f8d9200e)
1/*
2 * linux/arch/arm/mach-pxa/pxa3xx.c
3 *
4 * code specific to pxa3xx aka Monahans
5 *
6 * Copyright (C) 2006 Marvell International Ltd.
7 *
8 * 2007-09-02: eric miao <eric.miao@marvell.com>

--- 215 unchanged lines hidden (view full) ---

224 AD1D0ER = 0;
225 AD2D0ER = 0;
226 AD2D1ER = 0;
227 AD3ER = 0;
228
229 pxa_cpu_pm_fns = &pxa3xx_cpu_pm_fns;
230}
231
1/*
2 * linux/arch/arm/mach-pxa/pxa3xx.c
3 *
4 * code specific to pxa3xx aka Monahans
5 *
6 * Copyright (C) 2006 Marvell International Ltd.
7 *
8 * 2007-09-02: eric miao <eric.miao@marvell.com>

--- 215 unchanged lines hidden (view full) ---

224 AD1D0ER = 0;
225 AD2D0ER = 0;
226 AD2D1ER = 0;
227 AD3ER = 0;
228
229 pxa_cpu_pm_fns = &pxa3xx_cpu_pm_fns;
230}
231
232static int pxa3xx_set_wake(unsigned int irq, unsigned int on)
232static int pxa3xx_set_wake(struct irq_data *d, unsigned int on)
233{
234 unsigned long flags, mask = 0;
235
233{
234 unsigned long flags, mask = 0;
235
236 switch (irq) {
236 switch (d->irq) {
237 case IRQ_SSP3:
238 mask = ADXER_MFP_WSSP3;
239 break;
240 case IRQ_MSL:
241 mask = ADXER_WMSL0;
242 break;
243 case IRQ_USBH2:
244 case IRQ_USBH1:

--- 72 unchanged lines hidden (view full) ---

317
318 return 0;
319}
320#else
321static inline void pxa3xx_init_pm(void) {}
322#define pxa3xx_set_wake NULL
323#endif
324
237 case IRQ_SSP3:
238 mask = ADXER_MFP_WSSP3;
239 break;
240 case IRQ_MSL:
241 mask = ADXER_WMSL0;
242 break;
243 case IRQ_USBH2:
244 case IRQ_USBH1:

--- 72 unchanged lines hidden (view full) ---

317
318 return 0;
319}
320#else
321static inline void pxa3xx_init_pm(void) {}
322#define pxa3xx_set_wake NULL
323#endif
324
325static void pxa_ack_ext_wakeup(unsigned int irq)
325static void pxa_ack_ext_wakeup(struct irq_data *d)
326{
326{
327 PECR |= PECR_IS(irq - IRQ_WAKEUP0);
327 PECR |= PECR_IS(d->irq - IRQ_WAKEUP0);
328}
329
328}
329
330static void pxa_mask_ext_wakeup(unsigned int irq)
330static void pxa_mask_ext_wakeup(struct irq_data *d)
331{
331{
332 ICMR2 &= ~(1 << ((irq - PXA_IRQ(0)) & 0x1f));
333 PECR &= ~PECR_IE(irq - IRQ_WAKEUP0);
332 ICMR2 &= ~(1 << ((d->irq - PXA_IRQ(0)) & 0x1f));
333 PECR &= ~PECR_IE(d->irq - IRQ_WAKEUP0);
334}
335
334}
335
336static void pxa_unmask_ext_wakeup(unsigned int irq)
336static void pxa_unmask_ext_wakeup(struct irq_data *d)
337{
337{
338 ICMR2 |= 1 << ((irq - PXA_IRQ(0)) & 0x1f);
339 PECR |= PECR_IE(irq - IRQ_WAKEUP0);
338 ICMR2 |= 1 << ((d->irq - PXA_IRQ(0)) & 0x1f);
339 PECR |= PECR_IE(d->irq - IRQ_WAKEUP0);
340}
341
340}
341
342static int pxa_set_ext_wakeup_type(unsigned int irq, unsigned int flow_type)
342static int pxa_set_ext_wakeup_type(struct irq_data *d, unsigned int flow_type)
343{
344 if (flow_type & IRQ_TYPE_EDGE_RISING)
343{
344 if (flow_type & IRQ_TYPE_EDGE_RISING)
345 PWER |= 1 << (irq - IRQ_WAKEUP0);
345 PWER |= 1 << (d->irq - IRQ_WAKEUP0);
346
347 if (flow_type & IRQ_TYPE_EDGE_FALLING)
346
347 if (flow_type & IRQ_TYPE_EDGE_FALLING)
348 PWER |= 1 << (irq - IRQ_WAKEUP0 + 2);
348 PWER |= 1 << (d->irq - IRQ_WAKEUP0 + 2);
349
350 return 0;
351}
352
353static struct irq_chip pxa_ext_wakeup_chip = {
354 .name = "WAKEUP",
349
350 return 0;
351}
352
353static struct irq_chip pxa_ext_wakeup_chip = {
354 .name = "WAKEUP",
355 .ack = pxa_ack_ext_wakeup,
356 .mask = pxa_mask_ext_wakeup,
357 .unmask = pxa_unmask_ext_wakeup,
358 .set_type = pxa_set_ext_wakeup_type,
355 .irq_ack = pxa_ack_ext_wakeup,
356 .irq_mask = pxa_mask_ext_wakeup,
357 .irq_unmask = pxa_unmask_ext_wakeup,
358 .irq_set_type = pxa_set_ext_wakeup_type,
359};
360
361static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
362{
363 int irq;
364
365 for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) {
366 set_irq_chip(irq, &pxa_ext_wakeup_chip);
367 set_irq_handler(irq, handle_edge_irq);
368 set_irq_flags(irq, IRQF_VALID);
369 }
370
359};
360
361static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
362{
363 int irq;
364
365 for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) {
366 set_irq_chip(irq, &pxa_ext_wakeup_chip);
367 set_irq_handler(irq, handle_edge_irq);
368 set_irq_flags(irq, IRQF_VALID);
369 }
370
371 pxa_ext_wakeup_chip.set_wake = fn;
371 pxa_ext_wakeup_chip.irq_set_wake = fn;
372}
373
374void __init pxa3xx_init_irq(void)
375{
376 /* enable CP6 access */
377 u32 value;
378 __asm__ __volatile__("mrc p15, 0, %0, c15, c1, 0\n": "=r"(value));
379 value |= (1 << 6);

--- 99 unchanged lines hidden --- 		372}
373
374void __init pxa3xx_init_irq(void)
375{
376 /* enable CP6 access */
377 u32 value;
378 __asm__ __volatile__("mrc p15, 0, %0, c15, c1, 0\n": "=r"(value));
379 value |= (1 << 6);

--- 99 unchanged lines hidden ---