irq.c (55fa518867978e1f5fd8353098f80d125ac734d7) irq.c (a58fbcd8ad17ddaa0c7aadbbbd20de4ebc807fa4)
1/*
2 * linux/arch/arm/mach-pxa/irq.c
3 *
4 * Generic PXA IRQ handling
5 *
6 * Author: Nicolas Pitre
7 * Created: Jun 15, 2001
8 * Copyright: MontaVista Software Inc.

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16#include <linux/module.h>
17#include <linux/interrupt.h>
18#include <linux/sysdev.h>
19
20#include <mach/hardware.h>
21#include <asm/irq.h>
22#include <asm/mach/irq.h>
23#include <mach/pxa-regs.h>
1/*
2 * linux/arch/arm/mach-pxa/irq.c
3 *
4 * Generic PXA IRQ handling
5 *
6 * Author: Nicolas Pitre
7 * Created: Jun 15, 2001
8 * Copyright: MontaVista Software Inc.

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16#include <linux/module.h>
17#include <linux/interrupt.h>
18#include <linux/sysdev.h>
19
20#include <mach/hardware.h>
21#include <asm/irq.h>
22#include <asm/mach/irq.h>
23#include <mach/pxa-regs.h>
24#include <mach/gpio.h>
24
25#include "generic.h"
26
27#define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f)
28#define _ICMR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR))
29#define _ICLR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR))
30
31/*

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46
47static struct irq_chip pxa_internal_irq_chip = {
48 .name = "SC",
49 .ack = pxa_mask_irq,
50 .mask = pxa_mask_irq,
51 .unmask = pxa_unmask_irq,
52};
53
25
26#include "generic.h"
27
28#define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f)
29#define _ICMR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR))
30#define _ICLR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR))
31
32/*

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47
48static struct irq_chip pxa_internal_irq_chip = {
49 .name = "SC",
50 .ack = pxa_mask_irq,
51 .mask = pxa_mask_irq,
52 .unmask = pxa_unmask_irq,
53};
54
55/*
56 * GPIO IRQs for GPIO 0 and 1
57 */
58static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type)
59{
60 int gpio = irq - IRQ_GPIO0;
61
62 if (__gpio_is_occupied(gpio)) {
63 pr_err("%s failed: GPIO is configured\n", __func__);
64 return -EINVAL;
65 }
66
67 if (type & IRQ_TYPE_EDGE_RISING)
68 GRER0 |= GPIO_bit(gpio);
69 else
70 GRER0 &= ~GPIO_bit(gpio);
71
72 if (type & IRQ_TYPE_EDGE_FALLING)
73 GFER0 |= GPIO_bit(gpio);
74 else
75 GFER0 &= ~GPIO_bit(gpio);
76
77 return 0;
78}
79
80static void pxa_ack_low_gpio(unsigned int irq)
81{
82 GEDR0 = (1 << (irq - IRQ_GPIO0));
83}
84
85static void pxa_mask_low_gpio(unsigned int irq)
86{
87 ICMR &= ~(1 << (irq - PXA_IRQ(0)));
88}
89
90static void pxa_unmask_low_gpio(unsigned int irq)
91{
92 ICMR |= 1 << (irq - PXA_IRQ(0));
93}
94
95static struct irq_chip pxa_low_gpio_chip = {
96 .name = "GPIO-l",
97 .ack = pxa_ack_low_gpio,
98 .mask = pxa_mask_low_gpio,
99 .unmask = pxa_unmask_low_gpio,
100 .set_type = pxa_set_low_gpio_type,
101};
102
103static void __init pxa_init_low_gpio_irq(set_wake_t fn)
104{
105 int irq;
106
107 /* clear edge detection on GPIO 0 and 1 */
108 GFER0 &= ~0x3;
109 GRER0 &= ~0x3;
110 GEDR0 = 0x3;
111
112 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
113 set_irq_chip(irq, &pxa_low_gpio_chip);
114 set_irq_handler(irq, handle_edge_irq);
115 set_irq_flags(irq, IRQF_VALID);
116 }
117
118 pxa_low_gpio_chip.set_wake = fn;
119}
120
54void __init pxa_init_irq(int irq_nr, set_wake_t fn)
55{
56 int irq;
57
58 pxa_internal_irq_nr = irq_nr;
59
60 for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) {
61 _ICMR(irq) = 0; /* disable all IRQs */

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67
68 for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq++) {
69 set_irq_chip(irq, &pxa_internal_irq_chip);
70 set_irq_handler(irq, handle_level_irq);
71 set_irq_flags(irq, IRQF_VALID);
72 }
73
74 pxa_internal_irq_chip.set_wake = fn;
121void __init pxa_init_irq(int irq_nr, set_wake_t fn)
122{
123 int irq;
124
125 pxa_internal_irq_nr = irq_nr;
126
127 for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) {
128 _ICMR(irq) = 0; /* disable all IRQs */

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134
135 for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq++) {
136 set_irq_chip(irq, &pxa_internal_irq_chip);
137 set_irq_handler(irq, handle_level_irq);
138 set_irq_flags(irq, IRQF_VALID);
139 }
140
141 pxa_internal_irq_chip.set_wake = fn;
142 pxa_init_low_gpio_irq(fn);
75}
76
77#ifdef CONFIG_PM
78static unsigned long saved_icmr[2];
79
80static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
81{
82 int i, irq = PXA_IRQ(0);

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144
145#ifdef CONFIG_PM
146static unsigned long saved_icmr[2];
147
148static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
149{
150 int i, irq = PXA_IRQ(0);

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