vc.h (ba112a4e86ba8f0f9546bd953374cde064b507ca) vc.h (e4e021c5491537783f5f65a6defa92e6098a3658)
1/*
2 * OMAP3/4 Voltage Controller (VC) structure and macro definitions
3 *
4 * Copyright (C) 2007, 2010 Texas Instruments, Inc.
5 * Rajendra Nayak <rnayak@ti.com>
6 * Lesly A M <x0080970@ti.com>
7 * Thara Gopinath <thara@ti.com>
8 *

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22struct voltagedomain;
23
24/**
25 * struct omap_vc_common - per-VC register/bitfield data
26 * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
27 * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
28 * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
29 * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
1/*
2 * OMAP3/4 Voltage Controller (VC) structure and macro definitions
3 *
4 * Copyright (C) 2007, 2010 Texas Instruments, Inc.
5 * Rajendra Nayak <rnayak@ti.com>
6 * Lesly A M <x0080970@ti.com>
7 * Thara Gopinath <thara@ti.com>
8 *

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22struct voltagedomain;
23
24/**
25 * struct omap_vc_common - per-VC register/bitfield data
26 * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
27 * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
28 * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
29 * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
30 * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start
30 * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
31 * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register
32 * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register
33 * @regaddr_shift: REGADDR field shift in PRM_VC_BYPASS_VAL register
34 * @cmd_on_shift: ON field shift in PRM_VC_CMD_VAL_* register
35 * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register
36 * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register
37 * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register
38 *
39 * XXX One of cmd_on_mask and cmd_on_shift are not needed
40 * XXX VALID should probably be a shift, not a mask
41 */
42struct omap_vc_common {
43 u32 cmd_on_mask;
44 u32 valid;
45 u8 smps_sa_reg;
46 u8 smps_volra_reg;
31 * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
32 * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register
33 * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register
34 * @regaddr_shift: REGADDR field shift in PRM_VC_BYPASS_VAL register
35 * @cmd_on_shift: ON field shift in PRM_VC_CMD_VAL_* register
36 * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register
37 * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register
38 * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register
39 *
40 * XXX One of cmd_on_mask and cmd_on_shift are not needed
41 * XXX VALID should probably be a shift, not a mask
42 */
43struct omap_vc_common {
44 u32 cmd_on_mask;
45 u32 valid;
46 u8 smps_sa_reg;
47 u8 smps_volra_reg;
48 u8 smps_cmdra_reg;
47 u8 bypass_val_reg;
48 u8 data_shift;
49 u8 slaveaddr_shift;
50 u8 regaddr_shift;
51 u8 cmd_on_shift;
52 u8 cmd_onlp_shift;
53 u8 cmd_ret_shift;
54 u8 cmd_off_shift;
55};
56
57/**
58 * struct omap_vc_channel - VC per-instance data
59 * @i2c_slave_addr: I2C slave address of PMIC for this VC channel
49 u8 bypass_val_reg;
50 u8 data_shift;
51 u8 slaveaddr_shift;
52 u8 regaddr_shift;
53 u8 cmd_on_shift;
54 u8 cmd_onlp_shift;
55 u8 cmd_ret_shift;
56 u8 cmd_off_shift;
57};
58
59/**
60 * struct omap_vc_channel - VC per-instance data
61 * @i2c_slave_addr: I2C slave address of PMIC for this VC channel
62 * @volt_reg_addr: voltage configuration register address
63 * @cmd_reg_addr: command configuration register address
60 * @common: pointer to VC common data for this platform
61 * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
62 * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
64 * @common: pointer to VC common data for this platform
65 * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
66 * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
63 * @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register
64 *
65 * XXX It is not necessary to have both a *_mask and a *_shift -
66 * remove one
67 * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register
68 * @cmdval_reg: register for on/ret/off voltage level values for this channel
67 */
68struct omap_vc_channel {
69 /* channel state */
70 u16 i2c_slave_addr;
69 */
70struct omap_vc_channel {
71 /* channel state */
72 u16 i2c_slave_addr;
73 u16 volt_reg_addr;
74 u16 cmd_reg_addr;
71
72 /* register access data */
73 const struct omap_vc_common *common;
74 u32 smps_sa_mask;
75 u32 smps_volra_mask;
75
76 /* register access data */
77 const struct omap_vc_common *common;
78 u32 smps_sa_mask;
79 u32 smps_volra_mask;
80 u32 smps_cmdra_mask;
76 u8 cmdval_reg;
81 u8 cmdval_reg;
77 u8 smps_volra_shift;
78};
79
80extern struct omap_vc_channel omap3_vc_mpu;
81extern struct omap_vc_channel omap3_vc_core;
82
83extern struct omap_vc_channel omap4_vc_mpu;
84extern struct omap_vc_channel omap4_vc_iva;
85extern struct omap_vc_channel omap4_vc_core;

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83
84extern struct omap_vc_channel omap3_vc_mpu;
85extern struct omap_vc_channel omap3_vc_core;
86
87extern struct omap_vc_channel omap4_vc_mpu;
88extern struct omap_vc_channel omap4_vc_iva;
89extern struct omap_vc_channel omap4_vc_core;

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