| sleep34xx.S (d9db59103305eb5ec2a86369f32063e9921b6ac5) | sleep34xx.S (eeaf9646aca89d097861caa24d9818434e48810e) |
|---|---|
| 1/* 2 * (C) Copyright 2007 3 * Texas Instruments 4 * Karthik Dasu <karthik-dp@ti.com> 5 * 6 * (C) Copyright 2004 7 * Texas Instruments, <www.ti.com> 8 * Richard Woodruff <r-woodruff2@ti.com> --- 72 unchanged lines hidden (view full) --- 81 * L2 cache needs to be toggled for stable OFF mode functionality on 3630. 82 * This function sets up a flag that will allow for this toggling to take 83 * place on 3630. Hopefully some version in the future may not need this. 84 */ 85ENTRY(enable_omap3630_toggle_l2_on_restore) 86 stmfd sp!, {lr} @ save registers on stack 87 /* Setup so that we will disable and enable l2 */ 88 mov r1, #0x1 | 1/* 2 * (C) Copyright 2007 3 * Texas Instruments 4 * Karthik Dasu <karthik-dp@ti.com> 5 * 6 * (C) Copyright 2004 7 * Texas Instruments, <www.ti.com> 8 * Richard Woodruff <r-woodruff2@ti.com> --- 72 unchanged lines hidden (view full) --- 81 * L2 cache needs to be toggled for stable OFF mode functionality on 3630. 82 * This function sets up a flag that will allow for this toggling to take 83 * place on 3630. Hopefully some version in the future may not need this. 84 */ 85ENTRY(enable_omap3630_toggle_l2_on_restore) 86 stmfd sp!, {lr} @ save registers on stack 87 /* Setup so that we will disable and enable l2 */ 88 mov r1, #0x1 |
| 89 adrl r2, l2dis_3630 @ may be too distant for plain adr 90 str r1, [r2] | 89 adrl r3, l2dis_3630_offset @ may be too distant for plain adr 90 ldr r2, [r3] @ value for offset 91 str r1, [r2, r3] @ write to l2dis_3630 |
| 91 ldmfd sp!, {pc} @ restore regs and return 92ENDPROC(enable_omap3630_toggle_l2_on_restore) 93 94 .text 95/* Function to call rom code to save secure ram context */ 96 .align 3 97ENTRY(save_secure_ram_context) 98 stmfd sp!, {r4 - r11, lr} @ save registers on stack --- 311 unchanged lines hidden (view full) --- 410 * This tells us what was lost. 411 */ 412 ldr r1, pm_pwstctrl_mpu 413 ldr r2, [r1] 414 and r2, r2, #0x3 415 cmp r2, #0x0 @ Check if target power state was OFF or RET 416 bne logic_l1_restore 417 | 92 ldmfd sp!, {pc} @ restore regs and return 93ENDPROC(enable_omap3630_toggle_l2_on_restore) 94 95 .text 96/* Function to call rom code to save secure ram context */ 97 .align 3 98ENTRY(save_secure_ram_context) 99 stmfd sp!, {r4 - r11, lr} @ save registers on stack --- 311 unchanged lines hidden (view full) --- 411 * This tells us what was lost. 412 */ 413 ldr r1, pm_pwstctrl_mpu 414 ldr r2, [r1] 415 and r2, r2, #0x3 416 cmp r2, #0x0 @ Check if target power state was OFF or RET 417 bne logic_l1_restore 418 |
| 418 ldr r0, l2dis_3630 | 419 adr r1, l2dis_3630_offset @ address for offset 420 ldr r0, [r1] @ value for offset 421 ldr r0, [r1, r0] @ value at l2dis_3630 |
| 419 cmp r0, #0x1 @ should we disable L2 on 3630? 420 bne skipl2dis 421 mrc p15, 0, r0, c1, c0, 1 422 bic r0, r0, #2 @ disable L2 cache 423 mcr p15, 0, r0, c1, c0, 1 424skipl2dis: 425 ldr r0, control_stat 426 ldr r1, [r0] --- 52 unchanged lines hidden (view full) --- 479 mov r12, #0x3 480 smc #0 @ Call SMI monitor (smieq) 481 ldr r4, scratchpad_base 482 ldr r3, [r4,#0xBC] 483 ldr r0, [r3,#12] 484 mov r12, #0x2 485 smc #0 @ Call SMI monitor (smieq) 486logic_l1_restore: | 422 cmp r0, #0x1 @ should we disable L2 on 3630? 423 bne skipl2dis 424 mrc p15, 0, r0, c1, c0, 1 425 bic r0, r0, #2 @ disable L2 cache 426 mcr p15, 0, r0, c1, c0, 1 427skipl2dis: 428 ldr r0, control_stat 429 ldr r1, [r0] --- 52 unchanged lines hidden (view full) --- 482 mov r12, #0x3 483 smc #0 @ Call SMI monitor (smieq) 484 ldr r4, scratchpad_base 485 ldr r3, [r4,#0xBC] 486 ldr r0, [r3,#12] 487 mov r12, #0x2 488 smc #0 @ Call SMI monitor (smieq) 489logic_l1_restore: |
| 487 ldr r1, l2dis_3630 | 490 adr r0, l2dis_3630_offset @ adress for offset 491 ldr r1, [r0] @ value for offset 492 ldr r1, [r0, r1] @ value at l2dis_3630 |
| 488 cmp r1, #0x1 @ Test if L2 re-enable needed on 3630 489 bne skipl2reen 490 mrc p15, 0, r1, c1, c0, 1 491 orr r1, r1, #2 @ re-enable L2 cache 492 mcr p15, 0, r1, c1, c0, 1 493skipl2reen: 494 495 /* Now branch to the common CPU resume function */ --- 12 unchanged lines hidden (view full) --- 508scratchpad_base: 509 .word SCRATCHPAD_BASE_P 510sram_base: 511 .word SRAM_BASE_P + 0x8000 512control_stat: 513 .word CONTROL_STAT 514control_mem_rta: 515 .word CONTROL_MEM_RTA_CTRL | 493 cmp r1, #0x1 @ Test if L2 re-enable needed on 3630 494 bne skipl2reen 495 mrc p15, 0, r1, c1, c0, 1 496 orr r1, r1, #2 @ re-enable L2 cache 497 mcr p15, 0, r1, c1, c0, 1 498skipl2reen: 499 500 /* Now branch to the common CPU resume function */ --- 12 unchanged lines hidden (view full) --- 513scratchpad_base: 514 .word SCRATCHPAD_BASE_P 515sram_base: 516 .word SRAM_BASE_P + 0x8000 517control_stat: 518 .word CONTROL_STAT 519control_mem_rta: 520 .word CONTROL_MEM_RTA_CTRL |
| 521l2dis_3630_offset: 522 .long l2dis_3630 - . 523 524 .data |
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| 516l2dis_3630: 517 .word 0 518 519/* 520 * Internal functions 521 */ 522 523/* --- 53 unchanged lines hidden --- | 525l2dis_3630: 526 .word 0 527 528/* 529 * Internal functions 530 */ 531 532/* --- 53 unchanged lines hidden --- |