| sleep34xx.S (a89b6f006201469a74dfc0cc4e953648b6a1c69d) | sleep34xx.S (79dcfdd407208cba06bd446e93b0809df1cf10d1) |
|---|---|
| 1/* 2 * linux/arch/arm/mach-omap2/sleep.S 3 * 4 * (C) Copyright 2007 5 * Texas Instruments 6 * Karthik Dasu <karthik-dp@ti.com> 7 * 8 * (C) Copyright 2004 --- 270 unchanged lines hidden (view full) --- 279 mov r2, #4 @ set some flags in r2, r6 280 mov r6, #0xff 281 ldr r4, scratchpad_base 282 ldr r3, [r4, #0xBC] @ r3 points to parameters 283 mcr p15, 0, r0, c7, c10, 4 @ data write barrier 284 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier 285 .word 0xE1600071 @ call SMI monitor (smi #1) 286 | 1/* 2 * linux/arch/arm/mach-omap2/sleep.S 3 * 4 * (C) Copyright 2007 5 * Texas Instruments 6 * Karthik Dasu <karthik-dp@ti.com> 7 * 8 * (C) Copyright 2004 --- 270 unchanged lines hidden (view full) --- 279 mov r2, #4 @ set some flags in r2, r6 280 mov r6, #0xff 281 ldr r4, scratchpad_base 282 ldr r3, [r4, #0xBC] @ r3 points to parameters 283 mcr p15, 0, r0, c7, c10, 4 @ data write barrier 284 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier 285 .word 0xE1600071 @ call SMI monitor (smi #1) 286 |
| 287#ifdef CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE 288 /* Restore L2 aux control register */ 289 @ set service ID for PPA 290 mov r0, #CONFIG_OMAP3_L2_AUX_SECURE_SERVICE_SET_ID 291 mov r12, r0 @ copy service ID in r12 292 mov r1, #0 @ set task ID for ROM code in r1 293 mov r2, #4 @ set some flags in r2, r6 294 mov r6, #0xff 295 ldr r4, scratchpad_base 296 ldr r3, [r4, #0xBC] 297 adds r3, r3, #8 @ r3 points to parameters 298 mcr p15, 0, r0, c7, c10, 4 @ data write barrier 299 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier 300 .word 0xE1600071 @ call SMI monitor (smi #1) 301#endif |
|
| 287 b logic_l1_restore 288l2_inv_api_params: 289 .word 0x1, 0x00 290l2_inv_gp: 291 /* Execute smi to invalidate L2 cache */ 292 mov r12, #0x1 @ set up to invalide L2 293smi: .word 0xE1600070 @ Call SMI monitor (smieq) 294 /* Write to Aux control register to set some bits */ 295 ldr r4, scratchpad_base 296 ldr r3, [r4,#0xBC] 297 ldr r0, [r3,#4] 298 mov r12, #0x3 299 .word 0xE1600070 @ Call SMI monitor (smieq) | 302 b logic_l1_restore 303l2_inv_api_params: 304 .word 0x1, 0x00 305l2_inv_gp: 306 /* Execute smi to invalidate L2 cache */ 307 mov r12, #0x1 @ set up to invalide L2 308smi: .word 0xE1600070 @ Call SMI monitor (smieq) 309 /* Write to Aux control register to set some bits */ 310 ldr r4, scratchpad_base 311 ldr r3, [r4,#0xBC] 312 ldr r0, [r3,#4] 313 mov r12, #0x3 314 .word 0xE1600070 @ Call SMI monitor (smieq) |
| 315 ldr r4, scratchpad_base 316 ldr r3, [r4,#0xBC] 317 ldr r0, [r3,#12] 318 mov r12, #0x2 319 .word 0xE1600070 @ Call SMI monitor (smieq) |
|
| 300logic_l1_restore: 301 mov r1, #0 302 /* Invalidate all instruction caches to PoU 303 * and flush branch target cache */ 304 mcr p15, 0, r1, c7, c5, 0 305 306 ldr r4, scratchpad_base 307 ldr r3, [r4,#0xBC] | 320logic_l1_restore: 321 mov r1, #0 322 /* Invalidate all instruction caches to PoU 323 * and flush branch target cache */ 324 mcr p15, 0, r1, c7, c5, 0 325 326 ldr r4, scratchpad_base 327 ldr r3, [r4,#0xBC] |
| 308 adds r3, r3, #8 | 328 adds r3, r3, #16 |
| 309 ldmia r3!, {r4-r6} 310 mov sp, r4 311 msr spsr_cxsf, r5 312 mov lr, r6 313 314 ldmia r3!, {r4-r9} 315 /* Coprocessor access Control Register */ 316 mcr p15, 0, r4, c1, c0, 2 --- 102 unchanged lines hidden (view full) --- 419 mcr p15, 0, r4, c1, c0, 0 420 421 ldmfd sp!, {r0-r12, pc} @ restore regs and return 422save_context_wfi: 423 /*b save_context_wfi*/ @ enable to debug save code 424 mov r8, r0 /* Store SDRAM address in r8 */ 425 mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register 426 mov r4, #0x1 @ Number of parameters for restore call | 329 ldmia r3!, {r4-r6} 330 mov sp, r4 331 msr spsr_cxsf, r5 332 mov lr, r6 333 334 ldmia r3!, {r4-r9} 335 /* Coprocessor access Control Register */ 336 mcr p15, 0, r4, c1, c0, 2 --- 102 unchanged lines hidden (view full) --- 439 mcr p15, 0, r4, c1, c0, 0 440 441 ldmfd sp!, {r0-r12, pc} @ restore regs and return 442save_context_wfi: 443 /*b save_context_wfi*/ @ enable to debug save code 444 mov r8, r0 /* Store SDRAM address in r8 */ 445 mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register 446 mov r4, #0x1 @ Number of parameters for restore call |
| 427 stmia r8!, {r4-r5} | 447 stmia r8!, {r4-r5} @ Push parameters for restore call 448 mrc p15, 1, r5, c9, c0, 2 @ Read L2 AUX ctrl register 449 stmia r8!, {r4-r5} @ Push parameters for restore call |
| 428 /* Check what that target sleep state is:stored in r1*/ 429 /* 1 - Only L1 and logic lost */ 430 /* 2 - Only L2 lost */ 431 /* 3 - Both L1 and L2 lost */ 432 cmp r1, #0x2 /* Only L2 lost */ 433 beq clean_l2 434 cmp r1, #0x1 /* L2 retained */ 435 /* r9 stores whether to clean L2 or not*/ --- 215 unchanged lines hidden --- | 450 /* Check what that target sleep state is:stored in r1*/ 451 /* 1 - Only L1 and logic lost */ 452 /* 2 - Only L2 lost */ 453 /* 3 - Both L1 and L2 lost */ 454 cmp r1, #0x2 /* Only L2 lost */ 455 beq clean_l2 456 cmp r1, #0x1 /* L2 retained */ 457 /* r9 stores whether to clean L2 or not*/ --- 215 unchanged lines hidden --- |