powerdomain.c (12627578523d2d9396cae76b1dad0ed3dccf1730) | powerdomain.c (9b7fc907d9378f86eb6b823bbe84ec9ed584b091) |
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1/* 2 * OMAP powerdomain control 3 * 4 * Copyright (C) 2007-2008 Texas Instruments, Inc. 5 * Copyright (C) 2007-2009 Nokia Corporation 6 * 7 * Written by Paul Walmsley 8 * Added OMAP4 specific support by Abhijit Pagare <abhijitpagare@ti.com> 9 * State counting code by Tero Kristo <tero.kristo@nokia.com> 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15#undef DEBUG 16 17#include <linux/kernel.h> | 1/* 2 * OMAP powerdomain control 3 * 4 * Copyright (C) 2007-2008 Texas Instruments, Inc. 5 * Copyright (C) 2007-2009 Nokia Corporation 6 * 7 * Written by Paul Walmsley 8 * Added OMAP4 specific support by Abhijit Pagare <abhijitpagare@ti.com> 9 * State counting code by Tero Kristo <tero.kristo@nokia.com> 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15#undef DEBUG 16 17#include <linux/kernel.h> |
18#include <linux/module.h> | |
19#include <linux/types.h> | 18#include <linux/types.h> |
20#include <linux/delay.h> 21#include <linux/spinlock.h> | |
22#include <linux/list.h> 23#include <linux/errno.h> | 19#include <linux/list.h> 20#include <linux/errno.h> |
24#include <linux/err.h> 25#include <linux/io.h> | 21#include <linux/string.h> |
26 | 22 |
27#include <asm/atomic.h> 28 29#include "cm.h" 30#include "cm-regbits-34xx.h" 31#include "cm-regbits-44xx.h" 32#include "prm.h" 33#include "prm-regbits-34xx.h" 34#include "prm-regbits-44xx.h" 35 | |
36#include <plat/cpu.h> 37#include <plat/powerdomain.h> 38#include <plat/clockdomain.h> 39#include <plat/prcm.h> 40 41#include "pm.h" 42 43enum { 44 PWRDM_STATE_NOW = 0, 45 PWRDM_STATE_PREV, 46}; 47 | 23#include <plat/cpu.h> 24#include <plat/powerdomain.h> 25#include <plat/clockdomain.h> 26#include <plat/prcm.h> 27 28#include "pm.h" 29 30enum { 31 PWRDM_STATE_NOW = 0, 32 PWRDM_STATE_PREV, 33}; 34 |
48/* Variable holding value of the CPU dependent PWRSTCTRL Register Offset */ 49static u16 pwrstctrl_reg_offs; | |
50 | 35 |
51/* Variable holding value of the CPU dependent PWRSTST Register Offset */ 52static u16 pwrstst_reg_offs; 53 54/* OMAP3 and OMAP4 specific register bit initialisations 55 * Notice that the names here are not according to each power 56 * domain but the bit mapping used applies to all of them 57 */ 58 59/* OMAP3 and OMAP4 Memory Onstate Masks (common across all power domains) */ 60#define OMAP_MEM0_ONSTATE_MASK OMAP3430_SHAREDL1CACHEFLATONSTATE_MASK 61#define OMAP_MEM1_ONSTATE_MASK OMAP3430_L1FLATMEMONSTATE_MASK 62#define OMAP_MEM2_ONSTATE_MASK OMAP3430_SHAREDL2CACHEFLATONSTATE_MASK 63#define OMAP_MEM3_ONSTATE_MASK OMAP3430_L2FLATMEMONSTATE_MASK 64#define OMAP_MEM4_ONSTATE_MASK OMAP4430_OCP_NRET_BANK_ONSTATE_MASK 65 66/* OMAP3 and OMAP4 Memory Retstate Masks (common across all power domains) */ 67#define OMAP_MEM0_RETSTATE_MASK OMAP3430_SHAREDL1CACHEFLATRETSTATE_MASK 68#define OMAP_MEM1_RETSTATE_MASK OMAP3430_L1FLATMEMRETSTATE_MASK 69#define OMAP_MEM2_RETSTATE_MASK OMAP3430_SHAREDL2CACHEFLATRETSTATE_MASK 70#define OMAP_MEM3_RETSTATE_MASK OMAP3430_L2FLATMEMRETSTATE_MASK 71#define OMAP_MEM4_RETSTATE_MASK OMAP4430_OCP_NRET_BANK_RETSTATE_MASK 72 73/* OMAP3 and OMAP4 Memory Status bits */ 74#define OMAP_MEM0_STATEST_MASK OMAP3430_SHAREDL1CACHEFLATSTATEST_MASK 75#define OMAP_MEM1_STATEST_MASK OMAP3430_L1FLATMEMSTATEST_MASK 76#define OMAP_MEM2_STATEST_MASK OMAP3430_SHAREDL2CACHEFLATSTATEST_MASK 77#define OMAP_MEM3_STATEST_MASK OMAP3430_L2FLATMEMSTATEST_MASK 78#define OMAP_MEM4_STATEST_MASK OMAP4430_OCP_NRET_BANK_STATEST_MASK 79 | |
80/* pwrdm_list contains all registered struct powerdomains */ 81static LIST_HEAD(pwrdm_list); 82 83static struct pwrdm_ops *arch_pwrdm; 84 85/* Private functions */ 86 87static struct powerdomain *_pwrdm_lookup(const char *name) --- 132 unchanged lines hidden (view full) --- 220 * and not null, all of the referenced powerdomains will be 221 * registered. No return value. XXX pwrdm_list is not really a 222 * "list"; it is an array. Rename appropriately. 223 */ 224void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops *custom_funcs) 225{ 226 struct powerdomain **p = NULL; 227 | 36/* pwrdm_list contains all registered struct powerdomains */ 37static LIST_HEAD(pwrdm_list); 38 39static struct pwrdm_ops *arch_pwrdm; 40 41/* Private functions */ 42 43static struct powerdomain *_pwrdm_lookup(const char *name) --- 132 unchanged lines hidden (view full) --- 176 * and not null, all of the referenced powerdomains will be 177 * registered. No return value. XXX pwrdm_list is not really a 178 * "list"; it is an array. Rename appropriately. 179 */ 180void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops *custom_funcs) 181{ 182 struct powerdomain **p = NULL; 183 |
228 if (cpu_is_omap24xx() || cpu_is_omap34xx()) { 229 pwrstctrl_reg_offs = OMAP2_PM_PWSTCTRL; 230 pwrstst_reg_offs = OMAP2_PM_PWSTST; 231 } else if (cpu_is_omap44xx()) { 232 pwrstctrl_reg_offs = OMAP4_PM_PWSTCTRL; 233 pwrstst_reg_offs = OMAP4_PM_PWSTST; 234 } else { 235 printk(KERN_ERR "Power Domain struct not supported for " \ 236 "this CPU\n"); 237 return; 238 } 239 | |
240 if (!custom_funcs) 241 WARN(1, "powerdomain: No custom pwrdm functions registered\n"); 242 else 243 arch_pwrdm = custom_funcs; 244 245 if (pwrdm_list) { 246 for (p = pwrdm_list; *p; p++) 247 _pwrdm_register(*p); --- 313 unchanged lines hidden (view full) --- 561 * types of memory, depending on the powerdomain. Returns -EINVAL if 562 * the powerdomain pointer is null or the target power state is not 563 * not supported for this memory bank, -EEXIST if the target memory 564 * bank does not exist or is not controllable, or returns 0 upon 565 * success. 566 */ 567int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) 568{ | 184 if (!custom_funcs) 185 WARN(1, "powerdomain: No custom pwrdm functions registered\n"); 186 else 187 arch_pwrdm = custom_funcs; 188 189 if (pwrdm_list) { 190 for (p = pwrdm_list; *p; p++) 191 _pwrdm_register(*p); --- 313 unchanged lines hidden (view full) --- 505 * types of memory, depending on the powerdomain. Returns -EINVAL if 506 * the powerdomain pointer is null or the target power state is not 507 * not supported for this memory bank, -EEXIST if the target memory 508 * bank does not exist or is not controllable, or returns 0 upon 509 * success. 510 */ 511int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) 512{ |
569 u32 m; | 513 int ret = -EINVAL; |
570 571 if (!pwrdm) 572 return -EINVAL; 573 574 if (pwrdm->banks < (bank + 1)) 575 return -EEXIST; 576 577 if (!(pwrdm->pwrsts_mem_on[bank] & (1 << pwrst))) 578 return -EINVAL; 579 580 pr_debug("powerdomain: setting next memory powerstate for domain %s " 581 "bank %0x while pwrdm-ON to %0x\n", pwrdm->name, bank, pwrst); 582 | 514 515 if (!pwrdm) 516 return -EINVAL; 517 518 if (pwrdm->banks < (bank + 1)) 519 return -EEXIST; 520 521 if (!(pwrdm->pwrsts_mem_on[bank] & (1 << pwrst))) 522 return -EINVAL; 523 524 pr_debug("powerdomain: setting next memory powerstate for domain %s " 525 "bank %0x while pwrdm-ON to %0x\n", pwrdm->name, bank, pwrst); 526 |
583 /* 584 * The register bit names below may not correspond to the 585 * actual names of the bits in each powerdomain's register, 586 * but the type of value returned is the same for each 587 * powerdomain. 588 */ 589 switch (bank) { 590 case 0: 591 m = OMAP_MEM0_ONSTATE_MASK; 592 break; 593 case 1: 594 m = OMAP_MEM1_ONSTATE_MASK; 595 break; 596 case 2: 597 m = OMAP_MEM2_ONSTATE_MASK; 598 break; 599 case 3: 600 m = OMAP_MEM3_ONSTATE_MASK; 601 break; 602 case 4: 603 m = OMAP_MEM4_ONSTATE_MASK; 604 break; 605 default: 606 WARN_ON(1); /* should never happen */ 607 return -EEXIST; 608 } | 527 if (arch_pwrdm && arch_pwrdm->pwrdm_set_mem_onst) 528 ret = arch_pwrdm->pwrdm_set_mem_onst(pwrdm, bank, pwrst); |
609 | 529 |
610 prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), 611 pwrdm->prcm_offs, pwrstctrl_reg_offs); 612 613 return 0; | 530 return ret; |
614} 615 616/** 617 * pwrdm_set_mem_retst - set memory power state while powerdomain in RET 618 * @pwrdm: struct powerdomain * to set 619 * @bank: memory bank number to set (0-3) 620 * @pwrst: one of the PWRDM_POWER_* macros 621 * --- 4 unchanged lines hidden (view full) --- 626 * will be either RETENTION or OFF, if supported. Returns -EINVAL if 627 * the powerdomain pointer is null or the target power state is not 628 * not supported for this memory bank, -EEXIST if the target memory 629 * bank does not exist or is not controllable, or returns 0 upon 630 * success. 631 */ 632int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) 633{ | 531} 532 533/** 534 * pwrdm_set_mem_retst - set memory power state while powerdomain in RET 535 * @pwrdm: struct powerdomain * to set 536 * @bank: memory bank number to set (0-3) 537 * @pwrst: one of the PWRDM_POWER_* macros 538 * --- 4 unchanged lines hidden (view full) --- 543 * will be either RETENTION or OFF, if supported. Returns -EINVAL if 544 * the powerdomain pointer is null or the target power state is not 545 * not supported for this memory bank, -EEXIST if the target memory 546 * bank does not exist or is not controllable, or returns 0 upon 547 * success. 548 */ 549int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) 550{ |
634 u32 m; | 551 int ret = -EINVAL; |
635 636 if (!pwrdm) 637 return -EINVAL; 638 639 if (pwrdm->banks < (bank + 1)) 640 return -EEXIST; 641 642 if (!(pwrdm->pwrsts_mem_ret[bank] & (1 << pwrst))) 643 return -EINVAL; 644 645 pr_debug("powerdomain: setting next memory powerstate for domain %s " 646 "bank %0x while pwrdm-RET to %0x\n", pwrdm->name, bank, pwrst); 647 | 552 553 if (!pwrdm) 554 return -EINVAL; 555 556 if (pwrdm->banks < (bank + 1)) 557 return -EEXIST; 558 559 if (!(pwrdm->pwrsts_mem_ret[bank] & (1 << pwrst))) 560 return -EINVAL; 561 562 pr_debug("powerdomain: setting next memory powerstate for domain %s " 563 "bank %0x while pwrdm-RET to %0x\n", pwrdm->name, bank, pwrst); 564 |
648 /* 649 * The register bit names below may not correspond to the 650 * actual names of the bits in each powerdomain's register, 651 * but the type of value returned is the same for each 652 * powerdomain. 653 */ 654 switch (bank) { 655 case 0: 656 m = OMAP_MEM0_RETSTATE_MASK; 657 break; 658 case 1: 659 m = OMAP_MEM1_RETSTATE_MASK; 660 break; 661 case 2: 662 m = OMAP_MEM2_RETSTATE_MASK; 663 break; 664 case 3: 665 m = OMAP_MEM3_RETSTATE_MASK; 666 break; 667 case 4: 668 m = OMAP_MEM4_RETSTATE_MASK; 669 break; 670 default: 671 WARN_ON(1); /* should never happen */ 672 return -EEXIST; 673 } | 565 if (arch_pwrdm && arch_pwrdm->pwrdm_set_mem_retst) 566 ret = arch_pwrdm->pwrdm_set_mem_retst(pwrdm, bank, pwrst); |
674 | 567 |
675 prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, 676 pwrstctrl_reg_offs); 677 678 return 0; | 568 return ret; |
679} 680 681/** 682 * pwrdm_read_logic_pwrst - get current powerdomain logic retention power state 683 * @pwrdm: struct powerdomain * to get current logic retention power state 684 * 685 * Return the power state that the logic portion of powerdomain @pwrdm 686 * will enter when the powerdomain enters retention. Returns -EINVAL --- 62 unchanged lines hidden (view full) --- 749 * 750 * Return the powerdomain @pwrdm's current memory power state for bank 751 * @bank. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if 752 * the target memory bank does not exist or is not controllable, or 753 * returns the current memory power state upon success. 754 */ 755int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) 756{ | 569} 570 571/** 572 * pwrdm_read_logic_pwrst - get current powerdomain logic retention power state 573 * @pwrdm: struct powerdomain * to get current logic retention power state 574 * 575 * Return the power state that the logic portion of powerdomain @pwrdm 576 * will enter when the powerdomain enters retention. Returns -EINVAL --- 62 unchanged lines hidden (view full) --- 639 * 640 * Return the powerdomain @pwrdm's current memory power state for bank 641 * @bank. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if 642 * the target memory bank does not exist or is not controllable, or 643 * returns the current memory power state upon success. 644 */ 645int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) 646{ |
757 u32 m; | 647 int ret = -EINVAL; |
758 759 if (!pwrdm) | 648 649 if (!pwrdm) |
760 return -EINVAL; | 650 return ret; |
761 762 if (pwrdm->banks < (bank + 1)) | 651 652 if (pwrdm->banks < (bank + 1)) |
763 return -EEXIST; | 653 return ret; |
764 765 if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK) 766 bank = 1; 767 | 654 655 if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK) 656 bank = 1; 657 |
768 /* 769 * The register bit names below may not correspond to the 770 * actual names of the bits in each powerdomain's register, 771 * but the type of value returned is the same for each 772 * powerdomain. 773 */ 774 switch (bank) { 775 case 0: 776 m = OMAP_MEM0_STATEST_MASK; 777 break; 778 case 1: 779 m = OMAP_MEM1_STATEST_MASK; 780 break; 781 case 2: 782 m = OMAP_MEM2_STATEST_MASK; 783 break; 784 case 3: 785 m = OMAP_MEM3_STATEST_MASK; 786 break; 787 case 4: 788 m = OMAP_MEM4_STATEST_MASK; 789 break; 790 default: 791 WARN_ON(1); /* should never happen */ 792 return -EEXIST; 793 } | 658 if (arch_pwrdm && arch_pwrdm->pwrdm_read_mem_pwrst) 659 ret = arch_pwrdm->pwrdm_read_mem_pwrst(pwrdm, bank); |
794 | 660 |
795 return prm_read_mod_bits_shift(pwrdm->prcm_offs, 796 pwrstst_reg_offs, m); | 661 return ret; |
797} 798 799/** 800 * pwrdm_read_prev_mem_pwrst - get previous memory bank power state 801 * @pwrdm: struct powerdomain * to get previous memory bank power state 802 * @bank: memory bank number (0-3) 803 * 804 * Return the powerdomain @pwrdm's previous memory power state for 805 * bank @bank. Returns -EINVAL if the powerdomain pointer is null, 806 * -EEXIST if the target memory bank does not exist or is not 807 * controllable, or returns the previous memory power state upon 808 * success. 809 */ 810int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) 811{ | 662} 663 664/** 665 * pwrdm_read_prev_mem_pwrst - get previous memory bank power state 666 * @pwrdm: struct powerdomain * to get previous memory bank power state 667 * @bank: memory bank number (0-3) 668 * 669 * Return the powerdomain @pwrdm's previous memory power state for 670 * bank @bank. Returns -EINVAL if the powerdomain pointer is null, 671 * -EEXIST if the target memory bank does not exist or is not 672 * controllable, or returns the previous memory power state upon 673 * success. 674 */ 675int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) 676{ |
812 u32 m; | 677 int ret = -EINVAL; |
813 814 if (!pwrdm) | 678 679 if (!pwrdm) |
815 return -EINVAL; | 680 return ret; |
816 817 if (pwrdm->banks < (bank + 1)) | 681 682 if (pwrdm->banks < (bank + 1)) |
818 return -EEXIST; | 683 return ret; |
819 820 if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK) 821 bank = 1; 822 | 684 685 if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK) 686 bank = 1; 687 |
823 /* 824 * The register bit names below may not correspond to the 825 * actual names of the bits in each powerdomain's register, 826 * but the type of value returned is the same for each 827 * powerdomain. 828 */ 829 switch (bank) { 830 case 0: 831 m = OMAP3430_LASTMEM1STATEENTERED_MASK; 832 break; 833 case 1: 834 m = OMAP3430_LASTMEM2STATEENTERED_MASK; 835 break; 836 case 2: 837 m = OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK; 838 break; 839 case 3: 840 m = OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK; 841 break; 842 default: 843 WARN_ON(1); /* should never happen */ 844 return -EEXIST; 845 } | 688 if (arch_pwrdm && arch_pwrdm->pwrdm_read_prev_mem_pwrst) 689 ret = arch_pwrdm->pwrdm_read_prev_mem_pwrst(pwrdm, bank); |
846 | 690 |
847 return prm_read_mod_bits_shift(pwrdm->prcm_offs, 848 OMAP3430_PM_PREPWSTST, m); | 691 return ret; |
849} 850 851/** 852 * pwrdm_read_mem_retst - get next memory bank power state 853 * @pwrdm: struct powerdomain * to get mext memory bank power state 854 * @bank: memory bank number (0-3) 855 * 856 * Return the powerdomain pwrdm's next memory power state for bank 857 * x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if 858 * the target memory bank does not exist or is not controllable, or 859 * returns the next memory power state upon success. 860 */ 861int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) 862{ | 692} 693 694/** 695 * pwrdm_read_mem_retst - get next memory bank power state 696 * @pwrdm: struct powerdomain * to get mext memory bank power state 697 * @bank: memory bank number (0-3) 698 * 699 * Return the powerdomain pwrdm's next memory power state for bank 700 * x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if 701 * the target memory bank does not exist or is not controllable, or 702 * returns the next memory power state upon success. 703 */ 704int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) 705{ |
863 u32 m; | 706 int ret = -EINVAL; |
864 865 if (!pwrdm) | 707 708 if (!pwrdm) |
866 return -EINVAL; | 709 return ret; |
867 868 if (pwrdm->banks < (bank + 1)) | 710 711 if (pwrdm->banks < (bank + 1)) |
869 return -EEXIST; | 712 return ret; |
870 | 713 |
871 /* 872 * The register bit names below may not correspond to the 873 * actual names of the bits in each powerdomain's register, 874 * but the type of value returned is the same for each 875 * powerdomain. 876 */ 877 switch (bank) { 878 case 0: 879 m = OMAP_MEM0_RETSTATE_MASK; 880 break; 881 case 1: 882 m = OMAP_MEM1_RETSTATE_MASK; 883 break; 884 case 2: 885 m = OMAP_MEM2_RETSTATE_MASK; 886 break; 887 case 3: 888 m = OMAP_MEM3_RETSTATE_MASK; 889 break; 890 case 4: 891 m = OMAP_MEM4_RETSTATE_MASK; 892 break; 893 default: 894 WARN_ON(1); /* should never happen */ 895 return -EEXIST; 896 } | 714 if (arch_pwrdm && arch_pwrdm->pwrdm_read_mem_retst) 715 ret = arch_pwrdm->pwrdm_read_mem_retst(pwrdm, bank); |
897 | 716 |
898 return prm_read_mod_bits_shift(pwrdm->prcm_offs, 899 pwrstctrl_reg_offs, m); | 717 return ret; |
900} 901 902/** 903 * pwrdm_clear_all_prev_pwrst - clear previous powerstate register for a pwrdm 904 * @pwrdm: struct powerdomain * to clear 905 * 906 * Clear the powerdomain's previous power state register @pwrdm. 907 * Clears the entire register, including logic and memory bank 908 * previous power states. Returns -EINVAL if the powerdomain pointer 909 * is null, or returns 0 upon success. 910 */ 911int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) 912{ | 718} 719 720/** 721 * pwrdm_clear_all_prev_pwrst - clear previous powerstate register for a pwrdm 722 * @pwrdm: struct powerdomain * to clear 723 * 724 * Clear the powerdomain's previous power state register @pwrdm. 725 * Clears the entire register, including logic and memory bank 726 * previous power states. Returns -EINVAL if the powerdomain pointer 727 * is null, or returns 0 upon success. 728 */ 729int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) 730{ |
731 int ret = -EINVAL; 732 |
|
913 if (!pwrdm) | 733 if (!pwrdm) |
914 return -EINVAL; | 734 return ret; |
915 916 /* 917 * XXX should get the powerdomain's current state here; 918 * warn & fail if it is not ON. 919 */ 920 921 pr_debug("powerdomain: clearing previous power state reg for %s\n", 922 pwrdm->name); 923 | 735 736 /* 737 * XXX should get the powerdomain's current state here; 738 * warn & fail if it is not ON. 739 */ 740 741 pr_debug("powerdomain: clearing previous power state reg for %s\n", 742 pwrdm->name); 743 |
924 prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST); | 744 if (arch_pwrdm && arch_pwrdm->pwrdm_clear_all_prev_pwrst) 745 ret = arch_pwrdm->pwrdm_clear_all_prev_pwrst(pwrdm); |
925 | 746 |
926 return 0; | 747 return ret; |
927} 928 929/** 930 * pwrdm_enable_hdwr_sar - enable automatic hardware SAR for a pwrdm 931 * @pwrdm: struct powerdomain * 932 * 933 * Enable automatic context save-and-restore upon power state change 934 * for some devices in the powerdomain @pwrdm. Warning: this only 935 * affects a subset of devices in a powerdomain; check the TRM 936 * closely. Returns -EINVAL if the powerdomain pointer is null or if 937 * the powerdomain does not support automatic save-and-restore, or 938 * returns 0 upon success. 939 */ 940int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) 941{ | 748} 749 750/** 751 * pwrdm_enable_hdwr_sar - enable automatic hardware SAR for a pwrdm 752 * @pwrdm: struct powerdomain * 753 * 754 * Enable automatic context save-and-restore upon power state change 755 * for some devices in the powerdomain @pwrdm. Warning: this only 756 * affects a subset of devices in a powerdomain; check the TRM 757 * closely. Returns -EINVAL if the powerdomain pointer is null or if 758 * the powerdomain does not support automatic save-and-restore, or 759 * returns 0 upon success. 760 */ 761int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) 762{ |
763 int ret = -EINVAL; 764 |
|
942 if (!pwrdm) | 765 if (!pwrdm) |
943 return -EINVAL; | 766 return ret; |
944 945 if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) | 767 768 if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) |
946 return -EINVAL; | 769 return ret; |
947 948 pr_debug("powerdomain: %s: setting SAVEANDRESTORE bit\n", 949 pwrdm->name); 950 | 770 771 pr_debug("powerdomain: %s: setting SAVEANDRESTORE bit\n", 772 pwrdm->name); 773 |
951 prm_rmw_mod_reg_bits(0, 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, 952 pwrdm->prcm_offs, pwrstctrl_reg_offs); | 774 if (arch_pwrdm && arch_pwrdm->pwrdm_enable_hdwr_sar) 775 ret = arch_pwrdm->pwrdm_enable_hdwr_sar(pwrdm); |
953 | 776 |
954 return 0; | 777 return ret; |
955} 956 957/** 958 * pwrdm_disable_hdwr_sar - disable automatic hardware SAR for a pwrdm 959 * @pwrdm: struct powerdomain * 960 * 961 * Disable automatic context save-and-restore upon power state change 962 * for some devices in the powerdomain @pwrdm. Warning: this only 963 * affects a subset of devices in a powerdomain; check the TRM 964 * closely. Returns -EINVAL if the powerdomain pointer is null or if 965 * the powerdomain does not support automatic save-and-restore, or 966 * returns 0 upon success. 967 */ 968int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) 969{ | 778} 779 780/** 781 * pwrdm_disable_hdwr_sar - disable automatic hardware SAR for a pwrdm 782 * @pwrdm: struct powerdomain * 783 * 784 * Disable automatic context save-and-restore upon power state change 785 * for some devices in the powerdomain @pwrdm. Warning: this only 786 * affects a subset of devices in a powerdomain; check the TRM 787 * closely. Returns -EINVAL if the powerdomain pointer is null or if 788 * the powerdomain does not support automatic save-and-restore, or 789 * returns 0 upon success. 790 */ 791int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) 792{ |
793 int ret = -EINVAL; 794 |
|
970 if (!pwrdm) | 795 if (!pwrdm) |
971 return -EINVAL; | 796 return ret; |
972 973 if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) | 797 798 if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) |
974 return -EINVAL; | 799 return ret; |
975 976 pr_debug("powerdomain: %s: clearing SAVEANDRESTORE bit\n", 977 pwrdm->name); 978 | 800 801 pr_debug("powerdomain: %s: clearing SAVEANDRESTORE bit\n", 802 pwrdm->name); 803 |
979 prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, 0, 980 pwrdm->prcm_offs, pwrstctrl_reg_offs); | 804 if (arch_pwrdm && arch_pwrdm->pwrdm_disable_hdwr_sar) 805 ret = arch_pwrdm->pwrdm_disable_hdwr_sar(pwrdm); |
981 | 806 |
982 return 0; | 807 return ret; |
983} 984 985/** 986 * pwrdm_has_hdwr_sar - test whether powerdomain supports hardware SAR 987 * @pwrdm: struct powerdomain * 988 * 989 * Returns 1 if powerdomain @pwrdm supports hardware save-and-restore 990 * for some devices, or 0 if it does not. --- 10 unchanged lines hidden (view full) --- 1001 * Allows a powerdomain to transtion to a lower power sleep state 1002 * from an existing sleep state without waking up the powerdomain. 1003 * Returns -EINVAL if the powerdomain pointer is null or if the 1004 * powerdomain does not support LOWPOWERSTATECHANGE, or returns 0 1005 * upon success. 1006 */ 1007int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) 1008{ | 808} 809 810/** 811 * pwrdm_has_hdwr_sar - test whether powerdomain supports hardware SAR 812 * @pwrdm: struct powerdomain * 813 * 814 * Returns 1 if powerdomain @pwrdm supports hardware save-and-restore 815 * for some devices, or 0 if it does not. --- 10 unchanged lines hidden (view full) --- 826 * Allows a powerdomain to transtion to a lower power sleep state 827 * from an existing sleep state without waking up the powerdomain. 828 * Returns -EINVAL if the powerdomain pointer is null or if the 829 * powerdomain does not support LOWPOWERSTATECHANGE, or returns 0 830 * upon success. 831 */ 832int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) 833{ |
834 int ret = -EINVAL; 835 |
|
1009 if (!pwrdm) 1010 return -EINVAL; 1011 1012 if (!(pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) 1013 return -EINVAL; 1014 1015 pr_debug("powerdomain: %s: setting LOWPOWERSTATECHANGE bit\n", 1016 pwrdm->name); 1017 | 836 if (!pwrdm) 837 return -EINVAL; 838 839 if (!(pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) 840 return -EINVAL; 841 842 pr_debug("powerdomain: %s: setting LOWPOWERSTATECHANGE bit\n", 843 pwrdm->name); 844 |
1018 prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, 1019 (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), 1020 pwrdm->prcm_offs, pwrstctrl_reg_offs); | 845 if (arch_pwrdm && arch_pwrdm->pwrdm_set_lowpwrstchange) 846 ret = arch_pwrdm->pwrdm_set_lowpwrstchange(pwrdm); |
1021 | 847 |
1022 return 0; | 848 return ret; |
1023} 1024 1025/** 1026 * pwrdm_wait_transition - wait for powerdomain power transition to finish 1027 * @pwrdm: struct powerdomain * to wait for 1028 * 1029 * If the powerdomain @pwrdm is in the process of a state transition, 1030 * spin until it completes the power transition, or until an iteration 1031 * bailout value is reached. Returns -EINVAL if the powerdomain 1032 * pointer is null, -EAGAIN if the bailout value was reached, or 1033 * returns 0 upon success. 1034 */ 1035int pwrdm_wait_transition(struct powerdomain *pwrdm) 1036{ | 849} 850 851/** 852 * pwrdm_wait_transition - wait for powerdomain power transition to finish 853 * @pwrdm: struct powerdomain * to wait for 854 * 855 * If the powerdomain @pwrdm is in the process of a state transition, 856 * spin until it completes the power transition, or until an iteration 857 * bailout value is reached. Returns -EINVAL if the powerdomain 858 * pointer is null, -EAGAIN if the bailout value was reached, or 859 * returns 0 upon success. 860 */ 861int pwrdm_wait_transition(struct powerdomain *pwrdm) 862{ |
1037 u32 c = 0; | 863 int ret = -EINVAL; |
1038 1039 if (!pwrdm) 1040 return -EINVAL; 1041 | 864 865 if (!pwrdm) 866 return -EINVAL; 867 |
1042 /* 1043 * REVISIT: pwrdm_wait_transition() may be better implemented 1044 * via a callback and a periodic timer check -- how long do we expect 1045 * powerdomain transitions to take? 1046 */ | 868 if (arch_pwrdm && arch_pwrdm->pwrdm_wait_transition) 869 ret = arch_pwrdm->pwrdm_wait_transition(pwrdm); |
1047 | 870 |
1048 /* XXX Is this udelay() value meaningful? */ 1049 while ((prm_read_mod_reg(pwrdm->prcm_offs, pwrstst_reg_offs) & 1050 OMAP_INTRANSITION_MASK) && 1051 (c++ < PWRDM_TRANSITION_BAILOUT)) 1052 udelay(1); 1053 1054 if (c > PWRDM_TRANSITION_BAILOUT) { 1055 printk(KERN_ERR "powerdomain: waited too long for " 1056 "powerdomain %s to complete transition\n", pwrdm->name); 1057 return -EAGAIN; 1058 } 1059 1060 pr_debug("powerdomain: completed transition in %d loops\n", c); 1061 1062 return 0; | 871 return ret; |
1063} 1064 1065int pwrdm_state_switch(struct powerdomain *pwrdm) 1066{ 1067 return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW); 1068} 1069 1070int pwrdm_clkdm_state_switch(struct clockdomain *clkdm) --- 20 unchanged lines hidden --- | 872} 873 874int pwrdm_state_switch(struct powerdomain *pwrdm) 875{ 876 return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW); 877} 878 879int pwrdm_clkdm_state_switch(struct clockdomain *clkdm) --- 20 unchanged lines hidden --- |