io.c (640ec79d6d8c10ceb254c269a1f7fd9cb47ea655) io.c (33959553b81e46640994cbcdb4888d60022dc6fd)
1/*
2 * linux/arch/arm/mach-omap2/io.c
3 *
4 * OMAP2 I/O mapping code
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments
8 *

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167 .pfn = __phys_to_pfn(ZOOM_UART_BASE),
168 .length = SZ_1M,
169 .type = MT_DEVICE
170 },
171#endif
172};
173#endif
174
1/*
2 * linux/arch/arm/mach-omap2/io.c
3 *
4 * OMAP2 I/O mapping code
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments
8 *

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167 .pfn = __phys_to_pfn(ZOOM_UART_BASE),
168 .length = SZ_1M,
169 .type = MT_DEVICE
170 },
171#endif
172};
173#endif
174
175#ifdef CONFIG_SOC_OMAPTI81XX
175#ifdef CONFIG_SOC_TI81XX
176static struct map_desc omapti81xx_io_desc[] __initdata = {
177 {
178 .virtual = L4_34XX_VIRT,
179 .pfn = __phys_to_pfn(L4_34XX_PHYS),
180 .length = L4_34XX_SIZE,
181 .type = MT_DEVICE
182 }
183};

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210 },
211 {
212 .virtual = L4_44XX_VIRT,
213 .pfn = __phys_to_pfn(L4_44XX_PHYS),
214 .length = L4_44XX_SIZE,
215 .type = MT_DEVICE,
216 },
217 {
176static struct map_desc omapti81xx_io_desc[] __initdata = {
177 {
178 .virtual = L4_34XX_VIRT,
179 .pfn = __phys_to_pfn(L4_34XX_PHYS),
180 .length = L4_34XX_SIZE,
181 .type = MT_DEVICE
182 }
183};

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210 },
211 {
212 .virtual = L4_44XX_VIRT,
213 .pfn = __phys_to_pfn(L4_44XX_PHYS),
214 .length = L4_44XX_SIZE,
215 .type = MT_DEVICE,
216 },
217 {
218 .virtual = OMAP44XX_GPMC_VIRT,
219 .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
220 .length = OMAP44XX_GPMC_SIZE,
221 .type = MT_DEVICE,
222 },
223 {
224 .virtual = OMAP44XX_EMIF1_VIRT,
225 .pfn = __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
226 .length = OMAP44XX_EMIF1_SIZE,
227 .type = MT_DEVICE,
228 },
229 {
230 .virtual = OMAP44XX_EMIF2_VIRT,
231 .pfn = __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
232 .length = OMAP44XX_EMIF2_SIZE,
233 .type = MT_DEVICE,
234 },
235 {
236 .virtual = OMAP44XX_DMM_VIRT,
237 .pfn = __phys_to_pfn(OMAP44XX_DMM_PHYS),
238 .length = OMAP44XX_DMM_SIZE,
239 .type = MT_DEVICE,
240 },
241 {
218 .virtual = L4_PER_44XX_VIRT,
219 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
220 .length = L4_PER_44XX_SIZE,
221 .type = MT_DEVICE,
222 },
242 .virtual = L4_PER_44XX_VIRT,
243 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
244 .length = L4_PER_44XX_SIZE,
245 .type = MT_DEVICE,
246 },
247 {
248 .virtual = L4_EMU_44XX_VIRT,
249 .pfn = __phys_to_pfn(L4_EMU_44XX_PHYS),
250 .length = L4_EMU_44XX_SIZE,
251 .type = MT_DEVICE,
252 },
223#ifdef CONFIG_OMAP4_ERRATA_I688
224 {
225 .virtual = OMAP4_SRAM_VA,
226 .pfn = __phys_to_pfn(OMAP4_SRAM_PA),
227 .length = PAGE_SIZE,
228 .type = MT_MEMORY_SO,
229 },
230#endif

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250
251#ifdef CONFIG_ARCH_OMAP3
252void __init omap34xx_map_common_io(void)
253{
254 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
255}
256#endif
257
253#ifdef CONFIG_OMAP4_ERRATA_I688
254 {
255 .virtual = OMAP4_SRAM_VA,
256 .pfn = __phys_to_pfn(OMAP4_SRAM_PA),
257 .length = PAGE_SIZE,
258 .type = MT_MEMORY_SO,
259 },
260#endif

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280
281#ifdef CONFIG_ARCH_OMAP3
282void __init omap34xx_map_common_io(void)
283{
284 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
285}
286#endif
287
258#ifdef CONFIG_SOC_OMAPTI81XX
288#ifdef CONFIG_SOC_TI81XX
259void __init omapti81xx_map_common_io(void)
260{
261 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
262}
263#endif
264
265#ifdef CONFIG_SOC_OMAPAM33XX
266void __init omapam33xx_map_common_io(void)

--- 200 unchanged lines hidden --- 		289void __init omapti81xx_map_common_io(void)
290{
291 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
292}
293#endif
294
295#ifdef CONFIG_SOC_OMAPAM33XX
296void __init omapam33xx_map_common_io(void)

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